diff mbox

ARM: tegra: Re-add removed SoC id macro to tegra_resume()

Message ID 1412794450-9060-1-git-send-email-digetx@gmail.com
State Superseded, archived
Headers show

Commit Message

Dmitry Osipenko Oct. 8, 2014, 6:54 p.m. UTC
Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume
can work with current and later chips") removed tegra_get_soc_id macro leaving
used cpu register unassigned and as result causing execution of unintended code
on tegra20. Fix it by re-adding macro.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/mach-tegra/reset-handler.S | 1 +
 1 file changed, 1 insertion(+)

Comments

Felipe Balbi Oct. 8, 2014, 7:01 p.m. UTC | #1
Hi,

On Wed, Oct 08, 2014 at 10:54:10PM +0400, Dmitry Osipenko wrote:
> Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume
> can work with current and later chips") removed tegra_get_soc_id macro leaving
> used cpu register unassigned and as result causing execution of unintended code
> on tegra20. Fix it by re-adding macro.

you should add:

Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc: <stable@vger.kernel.org> # v3.13+

here. With that:

Reviewed-by: Felipe Balbi <balbi@ti.com>

> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  arch/arm/mach-tegra/reset-handler.S | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> index 7b2baab..71be4af 100644
> --- a/arch/arm/mach-tegra/reset-handler.S
> +++ b/arch/arm/mach-tegra/reset-handler.S
> @@ -51,6 +51,7 @@ ENTRY(tegra_resume)
>   THUMB(	it	ne )
>  	bne	cpu_resume			@ no
>  
> +	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
>  	/* Are we on Tegra20? */
>  	cmp	r6, #TEGRA20
>  	beq	1f				@ Yes
> -- 
> 2.1.1
> 
> --
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Felipe Balbi Oct. 8, 2014, 7:04 p.m. UTC | #2
On Wed, Oct 08, 2014 at 02:01:47PM -0500, Felipe Balbi wrote:
> Hi,
> 
> On Wed, Oct 08, 2014 at 10:54:10PM +0400, Dmitry Osipenko wrote:
> > Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume
> > can work with current and later chips") removed tegra_get_soc_id macro leaving
> > used cpu register unassigned and as result causing execution of unintended code
> > on tegra20. Fix it by re-adding macro.
> 
> you should add:
> 
> Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
> Cc: <stable@vger.kernel.org> # v3.13+
> 
> here. With that:
> 
> Reviewed-by: Felipe Balbi <balbi@ti.com>

oh, and you should probably Cc lakml.
diff mbox

Patch

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 7b2baab..71be4af 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -51,6 +51,7 @@  ENTRY(tegra_resume)
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
 
+	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
 	beq	1f				@ Yes