From patchwork Wed Oct 8 14:52:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Y Vo X-Patchwork-Id: 397654 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 96AB9140077 for ; Thu, 9 Oct 2014 02:00:23 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752503AbaJHPAW (ORCPT ); Wed, 8 Oct 2014 11:00:22 -0400 Received: from exprod5og106.obsmtp.com ([64.18.0.182]:43802 "HELO exprod5og106.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1750858AbaJHPAW (ORCPT ); Wed, 8 Oct 2014 11:00:22 -0400 X-Greylist: delayed 334 seconds by postgrey-1.27 at vger.kernel.org; Wed, 08 Oct 2014 11:00:21 EDT Received: from mail-pd0-f182.google.com ([209.85.192.182]) (using TLSv1) by exprod5ob106.postini.com ([64.18.4.12]) with SMTP ID DSNKVDVRhSZ68v9UDZd7f5K/A3oGXARF94f0@postini.com; Wed, 08 Oct 2014 08:00:22 PDT Received: by mail-pd0-f182.google.com with SMTP id y10so7057632pdj.27 for ; Wed, 08 Oct 2014 08:00:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WxiU86CEQmZjDT0YDrtlUEzEkRZ6f39bDjDlJ1TUoAc=; b=A5Q0LstdRS6jcjL8zCEVqyLXVZu0rMrE6LXJX/URDETS+ApTF3AhQ2C832Gw/+D/Ho tk1BuDTKDlMNxiJ9XjjNyo48h9VczgG6Bbh1KRn9BSgWMFIm+yO5oRd826ycr3o5LL8a hUK4V85oAFeoBhdU3GIDRGpDNVbqLnYdjGVzC1Sdbp3W4xmmX4PjKOq+nL2CnfppEaav buI7UVQjG+ipgxf7oablpzu1BZW5czSRhcZpgiusbQRiKbyWIZF8qermEhaf30JmjJRG +H1FFYshtCo7RnidHpWODA2wKyp4pouVvMN5HDBbJrQ2pEqlF1R+omHk4lrZV+/cmddW EN1g== X-Received: by 10.66.66.104 with SMTP id e8mr11211922pat.99.1412780094090; Wed, 08 Oct 2014 07:54:54 -0700 (PDT) X-Gm-Message-State: ALoCoQl+9dm92Gl4BBAA413dXBW9Zu2t0sPz3B5/GkrLDfoCk4uo/ikIwQY8SVLMP6Th7Bh4DwNgIFwmVN6laDgipmuR5wFvdMu8Cq+hZwsd1SxLKBb/JtjgUZ7GA1dNl4Muh3aRtIuDZdpokQ6ddbTNfplJ2ccUIw== X-Received: by 10.66.66.104 with SMTP id e8mr11211908pat.99.1412780094010; Wed, 08 Oct 2014 07:54:54 -0700 (PDT) Received: from hcmlab-sw2.amcc.com. ([118.69.219.197]) by mx.google.com with ESMTPSA id gu10sm214716pbc.72.2014.10.08.07.54.50 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 08 Oct 2014 07:54:52 -0700 (PDT) From: Y Vo To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Y Vo , Phong Vo , Toan Le , Tin Huynh , patches@apm.com Subject: [PATCH v1 2/3] Documentation: gpio: Add APM X-Gene standby GPIO controller DTS binding Date: Wed, 8 Oct 2014 21:52:27 +0700 Message-Id: <1412779948-28769-3-git-send-email-yvo@apm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1412779948-28769-1-git-send-email-yvo@apm.com> References: <1412779948-28769-1-git-send-email-yvo@apm.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Documentation for APM X-Gene standby GPIO controller DTS binding. Signed-off-by: Y Vo --- .../devicetree/bindings/gpio/gpio-xgene-sb.txt | 31 ++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt new file mode 100644 index 0000000..3215e4d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt @@ -0,0 +1,31 @@ +APM X-Gene Standby GPIO controller bindings + +This is a gpio controller in standby domain. + +There are 20 GPIO pins from 0..21. There is no GPIO_DS14 and GPIO_DS15. +Only GPIO_DS8..GPIO_DS13 support interrupt. IRQ mapping 0x28..0x2d. + +Required properties: +- compatible: "apm,xgene-gpio-sb" for X-Gene Standby GPIO controller +- reg: Physical base address and size of the controller's registers +- #gpio-cells: Should be two. + - first cell is the pin number + - second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- gpio-controller: Marks the device node as a GPIO controller. +- interrupts: Shall contains the interrupts. + +Example: + sbgpio: sbgpio@17001000 { + compatible = "apm,xgene-gpio-sb"; + reg = <0x0 0x17001000 0x0 0x400>; + #gpio-cells = <2>; + gpio-controller; + interrupts = <0x0 0x28 0x1>, + <0x0 0x29 0x1>, + <0x0 0x2a 0x1>, + <0x0 0x2b 0x1>, + <0x0 0x2c 0x1>, + <0x0 0x2d 0x1>; + };