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[U-Boot,v2,2/4] ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.

Message ID 1412737656-33561-3-git-send-email-Li.Xiubo@freescale.com
State Superseded
Delegated to: Albert ARIBAUD
Headers show

Commit Message

Xiubo Li Oct. 8, 2014, 3:07 a.m. UTC 
For some SoCs, the CONFIG_SYS_CLK_FREQ maybe won't equal the ARCH
Timer's frequency.

Here using the CONFIG_TIMER_CLK_FREQ instead if the ARCH Timer's
frequency need to config here.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
---
 arch/arm/cpu/armv7/nonsec_virt.S | 4 ++--
 include/configs/sun7i.h          | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 1ab5d54..30d81db 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -169,11 +169,11 @@  ENTRY(_nonsec_init)
  * we do this here instead.
  * But first check if we have the generic timer.
  */
-#ifdef CONFIG_SYS_CLK_FREQ
+#ifdef CONFIG_TIMER_CLK_FREQ
 	mrc	p15, 0, r0, c0, c1, 1		@ read ID_PFR1
 	and	r0, r0, #CPUID_ARM_GENTIMER_MASK	@ mask arch timer bits
 	cmp	r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
-	ldreq	r1, =CONFIG_SYS_CLK_FREQ
+	ldreq	r1, =CONFIG_TIMER_CLK_FREQ
 	mcreq	p15, 0, r1, c14, c0, 0		@ write CNTFRQ
 #endif
 
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index a902b84..6e201f2f 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -35,6 +35,7 @@ 
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_SYS_CLK_FREQ		24000000
+#define CONFIG_SYS_TIMER_CLK_FREQ	CONFIG_SYS_CLK_FREQ
 
 /*
  * Include common sunxi configuration where most the settings are