diff mbox

[U-Boot,v1,02/10] arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45

Message ID 1412142894-997-3-git-send-email-hs@denx.de
State Superseded, archived
Delegated to: Andreas Bießmann
Headers show

Commit Message

Heiko Schocher Oct. 1, 2014, 5:54 a.m. UTC
- compile mpddrc ram init code also for AT91SAM9M10G45
  based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
  in the cr configuration

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
---
 arch/arm/cpu/at91-common/Makefile |  6 +++++-
 arch/arm/cpu/at91-common/mpddrc.c | 11 ++++++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

Comments

Andreas Bießmann Oct. 25, 2014, 12:42 a.m. UTC | #1
Dear Heiko,

On 01.10.14 07:54, Heiko Schocher wrote:
> - compile mpddrc ram init code also for AT91SAM9M10G45
>   based boards.
> - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
>   in the cr configuration
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
> Cc: Bo Shen <voice.shen@atmel.com>

Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>

> ---
>  arch/arm/cpu/at91-common/Makefile |  6 +++++-
>  arch/arm/cpu/at91-common/mpddrc.c | 11 ++++++++++-
>  2 files changed, 15 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/cpu/at91-common/Makefile b/arch/arm/cpu/at91-common/Makefile
index 5b97838..f62863a 100644
--- a/arch/arm/cpu/at91-common/Makefile
+++ b/arch/arm/cpu/at91-common/Makefile
@@ -9,4 +9,8 @@ 
 #
 
 obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
-obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o
+ifneq ($(CONFIG_SPL_BUILD),)
+obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o
+obj-$(CONFIG_SAMA5D3) += mpddrc.o
+obj-y += spl.o
+endif
diff --git a/arch/arm/cpu/at91-common/mpddrc.c b/arch/arm/cpu/at91-common/mpddrc.c
index 76668d2..602e71e 100644
--- a/arch/arm/cpu/at91-common/mpddrc.c
+++ b/arch/arm/cpu/at91-common/mpddrc.c
@@ -17,6 +17,15 @@  static inline void atmel_mpddr_op(int mode, u32 ram_address)
 	writel(0, ram_address);
 }
 
+static int ddr2_decodtype_is_seq(u32 cr)
+{
+#if defined(CONFIG_SAMA5D3)
+	if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
+		return 0;
+#endif
+	return 1;
+}
+
 int ddr2_init(const unsigned int ram_address,
 	      const struct atmel_mpddr *mpddr_value)
 {
@@ -25,7 +34,7 @@  int ddr2_init(const unsigned int ram_address,
 
 	/* Compute bank offset according to NC in configuration register */
 	ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9;
-	if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED))
+	if (ddr2_decodtype_is_seq(mpddr_value->cr))
 		ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2)
 			   + 11;