From patchwork Wed Nov 25 17:03:07 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 39326 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by ozlabs.org (Postfix) with ESMTP id BEF90B7B68 for ; Thu, 26 Nov 2009 04:04:38 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758987AbZKYRDu (ORCPT ); Wed, 25 Nov 2009 12:03:50 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758984AbZKYRDs (ORCPT ); Wed, 25 Nov 2009 12:03:48 -0500 Received: from mail-ew0-f219.google.com ([209.85.219.219]:52887 "EHLO mail-ew0-f219.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758932AbZKYRDq (ORCPT ); Wed, 25 Nov 2009 12:03:46 -0500 Received: by mail-ew0-f219.google.com with SMTP id 19so593484ewy.21 for ; Wed, 25 Nov 2009 09:03:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :in-reply-to:references:subject; bh=b6G1E5gXBeW/4tKBFPFus1gAGAVc9N8C+kL8UArnNnM=; b=uISlvNVE0kN4/p66i9msnJ6UeO+TReUAWaVzvYJ7K2PCyMIsF3nMb5B3QxFCHgm8vP fFinrHYzUPoIEs1VuhWwmiVN+5wzh+5neW4uMmgna57TFqDUwREOmNjHXtFns41VIjS+ s2gcxghmnbiBQjvjnY7mS5h5JOAxYcoE6KO30= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:in-reply-to:references:subject; b=h5cCUlUxd2cSg4Qqfw5jOS3m0Dw6Ti1CYTzBL9zy2iVbkxV8kJq7PzP7Rnzbk00w/t hOCz6tK4SUgX8ydQVS+i/0yB2MLK3tO6yQaVZdsr+w74+Qj6xYkUQZvObnu6MRgYG5qF E4YlpbyqCZuyfOZ3DJo8u028N2trO3BsnmyHo= Received: by 10.216.91.81 with SMTP id g59mr646158wef.128.1259168631737; Wed, 25 Nov 2009 09:03:51 -0800 (PST) Received: from ?127.0.0.1? (chello089079027028.chello.pl [89.79.27.28]) by mx.google.com with ESMTPS id j8sm14609753gvb.17.2009.11.25.09.03.50 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 25 Nov 2009 09:03:50 -0800 (PST) From: Bartlomiej Zolnierkiewicz To: linux-ide@vger.kernel.org Cc: Bartlomiej Zolnierkiewicz , linux-kernel@vger.kernel.org Date: Wed, 25 Nov 2009 18:03:07 +0100 Message-Id: <20091125170307.5446.12439.sendpatchset@localhost> In-Reply-To: <20091125170218.5446.13513.sendpatchset@localhost> References: <20091125170218.5446.13513.sendpatchset@localhost> Subject: [PATCH 07/86] pata_artop: remove dead 34MHz PCI clock support Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Bartlomiej Zolnierkiewicz Subject: [PATCH] pata_artop: remove dead 34MHz PCI clock support It has been dead for the last three years (== since the initial driver merge) and probability that it will ever get fixed is quite low. Since there is no reason to keep this dead code around any longer just remove it (it can still be retrieved from the git history if necessary). Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/ata/pata_artop.c | 29 ++++++++--------------------- 1 file changed, 8 insertions(+), 21 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: b/drivers/ata/pata_artop.c =================================================================== --- a/drivers/ata/pata_artop.c +++ b/drivers/ata/pata_artop.c @@ -30,15 +30,6 @@ #define DRV_NAME "pata_artop" #define DRV_VERSION "0.4.5" -/* - * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we - * get PCI bus speed functionality we leave this as 0. Its a variable - * for when we get the functionality and also for folks wanting to - * test stuff. - */ - -static int clock = 0; - /** * atp8xx_prereset - probe begin * @link: link @@ -101,13 +92,11 @@ static void atp850_load_piomode(struct a { struct pci_dev *pdev = to_pci_dev(ap->host->dev); int dn = adev->devno + 2 * ap->port_no; - const u16 timing[2][5] = { - { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 }, - { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 } + const u16 timing[5] = + { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 }; - }; /* Load the PIO timing active/recovery bits */ - pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]); + pci_write_config_word(pdev, 0x40 + 2 * dn, timing[pio]); } /** @@ -156,13 +145,11 @@ static void atp86x_load_piomode(struct a { struct pci_dev *pdev = to_pci_dev(ap->host->dev); int dn = adev->devno + 2 * ap->port_no; - const u8 timing[2][5] = { - { 0x00, 0x0A, 0x08, 0x33, 0x31 }, - { 0x70, 0x7A, 0x78, 0x43, 0x41 } + const u8 timing[5] = + { 0x00, 0x0A, 0x08, 0x33, 0x31 }; - }; /* Load the PIO timing active/recovery bits */ - pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]); + pci_write_config_byte(pdev, 0x40 + dn, timing[pio]); } /** @@ -223,7 +210,7 @@ static void atp850_set_dmamode(struct at /* Add ultra DMA bits if in UDMA mode */ if (adev->dma_mode >= XFER_UDMA_0) { - u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock; + u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1; if (mode == 0) mode = 1; ultra |= (mode << (2 * dn)); @@ -261,7 +248,7 @@ static void atp86x_set_dmamode(struct at pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra); ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ if (adev->dma_mode >= XFER_UDMA_0) { - u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock; + u8 mode = adev->dma_mode - XFER_UDMA_0 + 1; if (mode == 0) mode = 1; ultra |= (mode << (4 * adev->devno));