| Message ID | 1411118904-22940-1-git-send-email-clsee@altera.com |
|---|---|
| State | Superseded |
| Delegated to: | Marek Vasut |
| Headers | show |
On Friday, September 19, 2014 at 11:28:23 AM, Chin Liang See wrote: > To enable the DesignWare MMC controller driver support > for SOCFPGA Cyclone5 dev kit > > Signed-off-by: Chin Liang See <clsee@altera.com> > Cc: Dinh Nguyen <dinguyen@altera.com> > Cc: Pavel Machek <pavel@denx.de> > Cc: Marek Vasut <marex@denx.de> > Cc: Tom Rini <trini@ti.com> > Cc: Albert Aribaud <albert.u.boot@aribaud.net> > Cc: Wolfgang Denk <wd@denx.de> > --- > include/configs/socfpga_cyclone5.h | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/include/configs/socfpga_cyclone5.h > b/include/configs/socfpga_cyclone5.h index 32175b7..f9fafac 100644 > --- a/include/configs/socfpga_cyclone5.h > +++ b/include/configs/socfpga_cyclone5.h > @@ -252,6 +252,24 @@ > /* Clocks source frequency to watchdog timer */ > #define CONFIG_DW_WDT_CLOCK_KHZ 25000 > > +/* > + * MMC support > + */ > +#define CONFIG_MMC > +#ifdef CONFIG_MMC > +#define CONFIG_CMD_MMC > +#define CONFIG_SDMMC_BASE (SOCFPGA_SDMMC_ADDRESS) This symbol doesn't exist. > +#define CONFIG_SDMMC_HOST_HS This symbol doesn't exist. > +#define CONFIG_GENERIC_MMC 1 You don't actually need to define this to have a value. > +#define CONFIG_DWMMC > +#define CONFIG_SOCFPGA_DWMMC > +#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 > +#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 > +#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 > +#define CONFIG_BOUNCE_BUFFER > +/* using smaller max blk cnt to avoid flooding the limited stack we have > */ +#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 This is something I am wondering about (btw. you might have seen a FIXME tag in my repository right next to this code). Do we really need this in U-Boot or is this portion SPL specific ? Or do we even need this limit at all ? [...] Anyway, I will pick them in my tree and add a bit more magic sause to them , then re-post the whole series. Best regards, Marek Vasut
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 32175b7..f9fafac 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -252,6 +252,24 @@ /* Clocks source frequency to watchdog timer */ #define CONFIG_DW_WDT_CLOCK_KHZ 25000 +/* + * MMC support + */ +#define CONFIG_MMC +#ifdef CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SDMMC_BASE (SOCFPGA_SDMMC_ADDRESS) +#define CONFIG_SDMMC_HOST_HS +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_DWMMC +#define CONFIG_SOCFPGA_DWMMC +#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 +#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 +#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 +#define CONFIG_BOUNCE_BUFFER +/* using smaller max blk cnt to avoid flooding the limited stack we have */ +#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 +#endif /* CONFIG_MMC */ /* * SPL "Second Program Loader" aka Initial Software
To enable the DesignWare MMC controller driver support for SOCFPGA Cyclone5 dev kit Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> --- include/configs/socfpga_cyclone5.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)