Message ID | 1410732754-14821-14-git-send-email-sjg@chromium.org |
---|---|
State | Changes Requested |
Delegated to: | Minkyu Kang |
Headers | show |
Hi, On 09/15/2014 12:12 AM, Simon Glass wrote: > Change this board to add a device tree. > > This also adds a pinmux header file although it is not used as yet. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v2: > - Avoid using a common file, and just add a device tree > - Fix device tree base addresses > > arch/arm/dts/Makefile | 1 + > arch/arm/dts/s5pc1xx-goni.dts | 28 ++++++++++++++ > arch/arm/include/asm/arch-s5pc1xx/periph.h | 61 ++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-s5pc1xx/pinmux.h | 50 ++++++++++++++++++++++++ > drivers/mmc/s5p_sdhci.c | 2 - > include/configs/s5p_goni.h | 7 +++- > 6 files changed, 146 insertions(+), 3 deletions(-) > create mode 100644 arch/arm/dts/s5pc1xx-goni.dts > create mode 100644 arch/arm/include/asm/arch-s5pc1xx/periph.h > create mode 100644 arch/arm/include/asm/arch-s5pc1xx/pinmux.h > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index f72207d..8a8ee56 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1,3 +1,4 @@ > +dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb > dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ > exynos4210-smdkv310.dtb \ > exynos4210-universal_c210.dtb \ > diff --git a/arch/arm/dts/s5pc1xx-goni.dts b/arch/arm/dts/s5pc1xx-goni.dts > new file mode 100644 > index 0000000..64d6bd3 > --- /dev/null > +++ b/arch/arm/dts/s5pc1xx-goni.dts > @@ -0,0 +1,28 @@ > +/* > + * Samsung's S5PC110-based Goni board device tree source > + * > + * Copyright (c) 2014 Google, Inc > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +/dts-v1/; > + > +#include "skeleton.dtsi" > + > +/ { > + model = "Samsung Goni based on S5PC110"; > + compatible = "samsung,goni", "samsung,s5pc110"; > + > + aliases { > + serial0 = "/serial@e2900000"; > + console = "/serial@e2900000"; > + }; > + > + serial@e2900000 { > + compatible = "samsung,exynos4210-uart"; > + reg = <0xe2900000 0x100>; > + interrupts = <0 51 0>; > + id = <0>; > + }; At goni platform default serial used for console is uart2, so it should be rather like this: + aliases { + serial2 = "/serial@e2900800"; + console = "/serial@e2900800"; + }; + + serial@e2900800 { + compatible = "samsung,exynos4210-uart"; + reg = <0xe2900800 0x400>; + id = <2>; + }; > +}; > diff --git a/arch/arm/include/asm/arch-s5pc1xx/periph.h b/arch/arm/include/asm/arch-s5pc1xx/periph.h > new file mode 100644 > index 0000000..5c1c3d4 > --- /dev/null > +++ b/arch/arm/include/asm/arch-s5pc1xx/periph.h > @@ -0,0 +1,61 @@ > +/* > + * Copyright (C) 2012 Samsung Electronics > + * Rajeshwari Shinde <rajeshwari.s@samsung.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef __ASM_ARM_ARCH_PERIPH_H > +#define __ASM_ARM_ARCH_PERIPH_H > + > +/* > + * Peripherals required for pinmux configuration. List will > + * grow with support for more devices getting added. > + * Numbering based on interrupt table. > + * > + */ > +enum periph_id { > + PERIPH_ID_UART0 = 51, > + PERIPH_ID_UART1, > + PERIPH_ID_UART2, > + PERIPH_ID_UART3, > + PERIPH_ID_I2C0 = 56, > + PERIPH_ID_I2C1, > + PERIPH_ID_I2C2, > + PERIPH_ID_I2C3, > + PERIPH_ID_I2C4, > + PERIPH_ID_I2C5, > + PERIPH_ID_I2C6, > + PERIPH_ID_I2C7, > + PERIPH_ID_SPI0 = 68, > + PERIPH_ID_SPI1, > + PERIPH_ID_SPI2, > + PERIPH_ID_SDMMC0 = 75, > + PERIPH_ID_SDMMC1, > + PERIPH_ID_SDMMC2, > + PERIPH_ID_SDMMC3, > + PERIPH_ID_I2C8 = 87, > + PERIPH_ID_I2C9, > + PERIPH_ID_I2S0 = 98, > + PERIPH_ID_I2S1 = 99, > + > + /* Since following peripherals do > + * not have shared peripheral interrupts (SPIs) > + * they are numbered arbitiraly after the maximum > + * SPIs Exynos has (128) > + */ > + PERIPH_ID_SROMC = 128, > + PERIPH_ID_SPI3, > + PERIPH_ID_SPI4, > + PERIPH_ID_SDMMC4, > + PERIPH_ID_PWM0, > + PERIPH_ID_PWM1, > + PERIPH_ID_PWM2, > + PERIPH_ID_PWM3, > + PERIPH_ID_PWM4, > + PERIPH_ID_I2C10 = 203, > + > + PERIPH_ID_NONE = -1, > +}; > + > +#endif /* __ASM_ARM_ARCH_PERIPH_H */ > diff --git a/arch/arm/include/asm/arch-s5pc1xx/pinmux.h b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h > new file mode 100644 > index 0000000..0b91ef6 > --- /dev/null > +++ b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h > @@ -0,0 +1,50 @@ > +/* > + * Copyright (C) 2012 Samsung Electronics > + * Abhilash Kesavan <a.kesavan@samsung.com> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#ifndef __ASM_ARM_ARCH_PINMUX_H > +#define __ASM_ARM_ARCH_PINMUX_H > + > +#include "periph.h" > + > +/* > + * Flags for setting specific configarations of peripherals. > + * List will grow with support for more devices getting added. > + */ > +enum { > + PINMUX_FLAG_NONE = 0x00000000, > + > + /* Flags for eMMC */ > + PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */ > + > + /* Flags for SROM controller */ > + PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */ > + PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */ > +}; > + > +/** > + * Configures the pinmux for a particular peripheral. > + * > + * Each gpio can be configured in many different ways (4 bits on exynos) > + * such as "input", "output", "special function", "external interrupt" > + * etc. This function will configure the peripheral pinmux along with > + * pull-up/down and drive strength. > + * > + * @param peripheral peripheral to be configured > + * @param flags configure flags > + * @return 0 if ok, -1 on error (e.g. unsupported peripheral) > + */ > +int exynos_pinmux_config(int peripheral, int flags); > + > +/** > + * Decode the peripheral id using the interrpt numbers. > + * > + * @param blob Device tree blob > + * @param node FDT I2C node to find > + * @return peripheral id if ok, PERIPH_ID_NONE on error > + */ > +int pinmux_decode_periph_id(const void *blob, int node); > +#endif > diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c > index 2ff0ec2..637dd97 100644 > --- a/drivers/mmc/s5p_sdhci.c > +++ b/drivers/mmc/s5p_sdhci.c > @@ -14,9 +14,7 @@ > #include <asm/arch/mmc.h> > #include <asm/arch/clk.h> > #include <errno.h> > -#ifdef CONFIG_OF_CONTROL > #include <asm/arch/pinmux.h> > -#endif > > static char *S5P_NAME = "SAMSUNG SDHCI"; > static void s5p_sdhci_set_control_reg(struct sdhci_host *host) > diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h > index a51215d..b22ac18 100644 > --- a/include/configs/s5p_goni.h > +++ b/include/configs/s5p_goni.h > @@ -53,6 +53,7 @@ > #define CONFIG_MMC > #define CONFIG_SDHCI > #define CONFIG_S5P_SDHCI > +#define SDHCI_MAX_HOSTS 4 > > /* PWM */ > #define CONFIG_PWM 1 > @@ -106,7 +107,6 @@ > ",12m(modem)"\ > ",60m(qboot)\0" > > -#define CONFIG_BOOTDELAY 1 > #define CONFIG_ZERO_BOOTDELAY_CHECK > > /* partitions definitions */ > @@ -283,4 +283,9 @@ > #define CONFIG_CMD_USB_MASS_STORAGE > #define CONFIG_USB_GADGET_MASS_STORAGE > > +#define CONFIG_DEFAULT_DEVICE_TREE s5pc1xx-goni > +#define CONFIG_OF_CONTROL > +#define CONFIG_OF_SEPARATE > +#define CONFIG_OF_LIBFDT > + > #endif /* __CONFIG_H */ > Thanks, Robert Baldyga
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f72207d..8a8ee56 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-universal_c210.dtb \ diff --git a/arch/arm/dts/s5pc1xx-goni.dts b/arch/arm/dts/s5pc1xx-goni.dts new file mode 100644 index 0000000..64d6bd3 --- /dev/null +++ b/arch/arm/dts/s5pc1xx-goni.dts @@ -0,0 +1,28 @@ +/* + * Samsung's S5PC110-based Goni board device tree source + * + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + model = "Samsung Goni based on S5PC110"; + compatible = "samsung,goni", "samsung,s5pc110"; + + aliases { + serial0 = "/serial@e2900000"; + console = "/serial@e2900000"; + }; + + serial@e2900000 { + compatible = "samsung,exynos4210-uart"; + reg = <0xe2900000 0x100>; + interrupts = <0 51 0>; + id = <0>; + }; +}; diff --git a/arch/arm/include/asm/arch-s5pc1xx/periph.h b/arch/arm/include/asm/arch-s5pc1xx/periph.h new file mode 100644 index 0000000..5c1c3d4 --- /dev/null +++ b/arch/arm/include/asm/arch-s5pc1xx/periph.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Rajeshwari Shinde <rajeshwari.s@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARM_ARCH_PERIPH_H +#define __ASM_ARM_ARCH_PERIPH_H + +/* + * Peripherals required for pinmux configuration. List will + * grow with support for more devices getting added. + * Numbering based on interrupt table. + * + */ +enum periph_id { + PERIPH_ID_UART0 = 51, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + PERIPH_ID_UART3, + PERIPH_ID_I2C0 = 56, + PERIPH_ID_I2C1, + PERIPH_ID_I2C2, + PERIPH_ID_I2C3, + PERIPH_ID_I2C4, + PERIPH_ID_I2C5, + PERIPH_ID_I2C6, + PERIPH_ID_I2C7, + PERIPH_ID_SPI0 = 68, + PERIPH_ID_SPI1, + PERIPH_ID_SPI2, + PERIPH_ID_SDMMC0 = 75, + PERIPH_ID_SDMMC1, + PERIPH_ID_SDMMC2, + PERIPH_ID_SDMMC3, + PERIPH_ID_I2C8 = 87, + PERIPH_ID_I2C9, + PERIPH_ID_I2S0 = 98, + PERIPH_ID_I2S1 = 99, + + /* Since following peripherals do + * not have shared peripheral interrupts (SPIs) + * they are numbered arbitiraly after the maximum + * SPIs Exynos has (128) + */ + PERIPH_ID_SROMC = 128, + PERIPH_ID_SPI3, + PERIPH_ID_SPI4, + PERIPH_ID_SDMMC4, + PERIPH_ID_PWM0, + PERIPH_ID_PWM1, + PERIPH_ID_PWM2, + PERIPH_ID_PWM3, + PERIPH_ID_PWM4, + PERIPH_ID_I2C10 = 203, + + PERIPH_ID_NONE = -1, +}; + +#endif /* __ASM_ARM_ARCH_PERIPH_H */ diff --git a/arch/arm/include/asm/arch-s5pc1xx/pinmux.h b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h new file mode 100644 index 0000000..0b91ef6 --- /dev/null +++ b/arch/arm/include/asm/arch-s5pc1xx/pinmux.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Abhilash Kesavan <a.kesavan@samsung.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARM_ARCH_PINMUX_H +#define __ASM_ARM_ARCH_PINMUX_H + +#include "periph.h" + +/* + * Flags for setting specific configarations of peripherals. + * List will grow with support for more devices getting added. + */ +enum { + PINMUX_FLAG_NONE = 0x00000000, + + /* Flags for eMMC */ + PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */ + + /* Flags for SROM controller */ + PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */ + PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */ +}; + +/** + * Configures the pinmux for a particular peripheral. + * + * Each gpio can be configured in many different ways (4 bits on exynos) + * such as "input", "output", "special function", "external interrupt" + * etc. This function will configure the peripheral pinmux along with + * pull-up/down and drive strength. + * + * @param peripheral peripheral to be configured + * @param flags configure flags + * @return 0 if ok, -1 on error (e.g. unsupported peripheral) + */ +int exynos_pinmux_config(int peripheral, int flags); + +/** + * Decode the peripheral id using the interrpt numbers. + * + * @param blob Device tree blob + * @param node FDT I2C node to find + * @return peripheral id if ok, PERIPH_ID_NONE on error + */ +int pinmux_decode_periph_id(const void *blob, int node); +#endif diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 2ff0ec2..637dd97 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -14,9 +14,7 @@ #include <asm/arch/mmc.h> #include <asm/arch/clk.h> #include <errno.h> -#ifdef CONFIG_OF_CONTROL #include <asm/arch/pinmux.h> -#endif static char *S5P_NAME = "SAMSUNG SDHCI"; static void s5p_sdhci_set_control_reg(struct sdhci_host *host) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index a51215d..b22ac18 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -53,6 +53,7 @@ #define CONFIG_MMC #define CONFIG_SDHCI #define CONFIG_S5P_SDHCI +#define SDHCI_MAX_HOSTS 4 /* PWM */ #define CONFIG_PWM 1 @@ -106,7 +107,6 @@ ",12m(modem)"\ ",60m(qboot)\0" -#define CONFIG_BOOTDELAY 1 #define CONFIG_ZERO_BOOTDELAY_CHECK /* partitions definitions */ @@ -283,4 +283,9 @@ #define CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_DEFAULT_DEVICE_TREE s5pc1xx-goni +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_OF_LIBFDT + #endif /* __CONFIG_H */
Change this board to add a device tree. This also adds a pinmux header file although it is not used as yet. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v2: - Avoid using a common file, and just add a device tree - Fix device tree base addresses arch/arm/dts/Makefile | 1 + arch/arm/dts/s5pc1xx-goni.dts | 28 ++++++++++++++ arch/arm/include/asm/arch-s5pc1xx/periph.h | 61 ++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-s5pc1xx/pinmux.h | 50 ++++++++++++++++++++++++ drivers/mmc/s5p_sdhci.c | 2 - include/configs/s5p_goni.h | 7 +++- 6 files changed, 146 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/s5pc1xx-goni.dts create mode 100644 arch/arm/include/asm/arch-s5pc1xx/periph.h create mode 100644 arch/arm/include/asm/arch-s5pc1xx/pinmux.h