[msp430] fix RLAM opcodes
diff mbox

Message ID 201409121813.s8CIDm0w008742@greed.delorie.com
State New
Headers show

Commit Message

DJ Delorie Sept. 12, 2014, 6:13 p.m. UTC
This fixes cases where negative indices are used for array offsets.
Committed.

	* config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
	(extend_and_shift1_hipsi2): Likewise.
	(extend_and_shift2_hipsi2): Likewise.

Comments

DJ Delorie Sept. 12, 2014, 6:24 p.m. UTC | #1
> This fixes cases where negative indices are used for array offsets.
> Committed.
> 
> 	* config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
> 	(extend_and_shift1_hipsi2): Likewise.
> 	(extend_and_shift2_hipsi2): Likewise.

Committed to 4.9 branch too.

Patch
diff mbox

Index: gcc/config/msp430/msp430.md
===================================================================
--- gcc/config/msp430/msp430.md	(revision 215228)
+++ gcc/config/msp430/msp430.md	(working copy)
@@ -565,13 +565,13 @@ 
 )
 
 (define_insn "extendhipsi2"
   [(set (match_operand:PSI 0 "nonimmediate_operand" "=r")
 	(subreg:PSI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) 0))]
   "TARGET_LARGE"
-  "RLAM #4, %0 { RRAM #4, %0"
+  "RLAM.A #4, %0 { RRAM.A #4, %0"
 )
 
 ;; Look for cases where integer/pointer conversions are suboptimal due
 ;; to missing patterns, despite us not having opcodes for these
 ;; patterns.  Doing these manually allows for alternate optimization
 ;; paths.
@@ -593,21 +593,21 @@ 
 
 (define_insn "extend_and_shift1_hipsi2"
   [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0)
 	(ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0"))
 		   (const_int 1)))]
   "TARGET_LARGE"
-  "RLAM #4, %0 { RRAM #3, %0"
+  "RLAM.A #4, %0 { RRAM.A #3, %0"
 )
 
 (define_insn "extend_and_shift2_hipsi2"
   [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0)
 	(ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0"))
 		   (const_int 2)))]
   "TARGET_LARGE"
-  "RLAM #4, %0 { RRAM #2, %0"
+  "RLAM.A #4, %0 { RRAM.A #2, %0"
 )
 
 ; Nasty - we are sign-extending a 20-bit PSI value in one register into
 ; two adjacent 16-bit registers to make an SI value.  There is no MSP430X
 ; instruction that will do this, so we push the 20-bit value onto the stack
 ; and then pop it off as two 16-bit values.