Message ID | 07ca9d2c89cf4f01037c98e3314dd035e4d2ee34.1410416224.git.hock.leong.kweh@intel.com |
---|---|
State | Changes Requested, archived |
Delegated to: | David Miller |
Headers | show |
From: Kweh Hock Leong <hock.leong.kweh@intel.com> Date: Thu, 11 Sep 2014 16:38:39 +0800 > + if ((!strcmp(quark_x1000_phy_info[i].board_name, board_name)) && > + quark_x1000_phy_info[i].pci_func_num == func_num) It is entirely erroneous to identify a device by it's _PHYSICAL_ geographic location on the PCI bus. Please get rid of this PCI function number comparison and if necessary find another means of identification. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> -----Original Message----- > From: David Miller [mailto:davem@davemloft.net] > Sent: Saturday, September 13, 2014 6:14 AM > From: Kweh Hock Leong <hock.leong.kweh@intel.com> > Date: Thu, 11 Sep 2014 16:38:39 +0800 > > > + if ((!strcmp(quark_x1000_phy_info[i].board_name, > board_name)) && > > + quark_x1000_phy_info[i].pci_func_num == func_num) > > It is entirely erroneous to identify a device by it's _PHYSICAL_ geographic > location on the PCI bus. > > Please get rid of this PCI function number comparison and if necessary find > another means of identification. Hi David, Here is some background of this work. Intel Quark X1000 has 2 stmmac Ethernet IP built in the SoC. They both are using the same PCI DEVICE ID number. The only things to differentiate them is PCI BUS DEVICE FUNCTION (Bus:Dev:Func) number which are fix numbers 00:20:6 for port 1 and 00:20:7 for port 2 stated in Quark X1000 datasheet. (https://communities.intel.com/docs/DOC-23092 page 44 & 97) When I was looking into making the code to upstream, I do think about is there a better identification way to do it? But, my mind still brought me back to this PCI FUNC number. So, i would like to understand the concern of using PCI FUNC number and also would like to see is there any advices, suggestion or pointer to deal with the scenario here. Appreciate to the comments sharing. Thanks. Regards, Wilson -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: "Kweh, Hock Leong" <hock.leong.kweh@intel.com> Date: Mon, 15 Sep 2014 12:42:03 +0000 > The only things to differentiate them is PCI BUS DEVICE FUNCTION > (Bus:Dev:Func) number which are fix numbers 00:20:6 for port 1 and > 00:20:7 for port 2 stated in Quark X1000 datasheet. Match on the PCI device class, which must be PCI_CLASS_NETWORK_ETHERNET or similar. The pci_device_id used for probing supports matching on this directly. . -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> -----Original Message----- > From: David Miller [mailto:davem@davemloft.net] > Sent: Wednesday, September 17, 2014 3:01 AM > From: "Kweh, Hock Leong" <hock.leong.kweh@intel.com> > Date: Mon, 15 Sep 2014 12:42:03 +0000 > > > The only things to differentiate them is PCI BUS DEVICE FUNCTION > > (Bus:Dev:Func) number which are fix numbers 00:20:6 for port 1 and > > 00:20:7 for port 2 stated in Quark X1000 datasheet. > > Match on the PCI device class, which must be > PCI_CLASS_NETWORK_ETHERNET or similar. > > The pci_device_id used for probing supports matching on this directly. > . Hi David, Thanks for the pointer. I did a quickly checking on the class number to see if I could use it for differentiation the ports number. Whereas I found them both have the same class number as well. Below shows the "lspci" dump to all the PCI devices on Quark X1000 Galileo board (Ethernet controllers are 00:14.6 and 00:14.7). Very unfortunately we are unlikely to use the class number as well as pci_device_id for the differentiation. Thanks. root@quark:~# lspci -m 00:00.0 "Class 0600" "8086" "0958" "8086" "095e" 00:14.0 "Class 0805" "8086" "08a7" "8086" "08a7" 00:14.1 "Class 0700" "8086" "0936" "8086" "0936" 00:14.2 "Class 0c03" "8086" "0939" "8086" "0939" 00:14.3 "Class 0c03" "8086" "0939" "8086" "0939" 00:14.4 "Class 0c03" "8086" "093a" "8086" "093a" 00:14.5 "Class 0700" "8086" "0936" "8086" "0936" 00:14.6 "Class 0200" "8086" "0937" "8086" "0937" 00:14.7 "Class 0200" "8086" "0937" "8086" "0937" 00:15.0 "Class 0c80" "8086" "0935" "8086" "0935" 00:15.1 "Class 0c80" "8086" "0935" "8086" "0935" 00:15.2 "Class 0c80" "8086" "0934" "8086" "0934" 00:17.0 "Class 0604" "8086" "11c3" "8086" "11c3" 00:17.1 "Class 0604" "8086" "11c4" "8086" "11c4" 00:1f.0 "Class 0601" "8086" "095e" "8086" "095e" root@quark:~# lspci -k 00:00.0 Class 0600: 8086:0958 iosf_mbi_pci 00:14.0 Class 0805: 8086:08a7 sdhci-pci 00:14.1 Class 0700: 8086:0936 serial 00:14.2 Class 0c03: 8086:0939 00:14.3 Class 0c03: 8086:0939 ehci-pci 00:14.4 Class 0c03: 8086:093a ohci-pci 00:14.5 Class 0700: 8086:0936 serial 00:14.6 Class 0200: 8086:0937 stmmaceth 00:14.7 Class 0200: 8086:0937 00:15.0 Class 0c80: 8086:0935 00:15.1 Class 0c80: 8086:0935 00:15.2 Class 0c80: 8086:0934 00:17.0 Class 0604: 8086:11c3 pcieport 00:17.1 Class 0604: 8086:11c4 pcieport 00:1f.0 Class 0601: 8086:095e root@quark:~# Regards, Wilson -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: "Kweh, Hock Leong" <hock.leong.kweh@intel.com> Date: Wed, 17 Sep 2014 02:41:39 +0000 > Thanks for the pointer. I did a quickly checking on the class number to see if > I could use it for differentiation the ports number. Whereas I found them > both have the same class number as well. Below shows the "lspci" dump to > all the PCI devices on Quark X1000 Galileo board (Ethernet controllers are > 00:14.6 and 00:14.7). Very unfortunately we are unlikely to use the class > number as well as pci_device_id for the differentiation. ... > 00:14.6 "Class 0200" "8086" "0937" "8086" "0937" > 00:14.7 "Class 0200" "8086" "0937" "8086" "0937" Are you kidding me? It's a perfect way to identify this device, it properly uses PCI_CLASS_NETWORK_ETHERNET (0x0200) in both cases and this will not match any other function on this PCI device at all. Please do as I suggested and use the PCI class for the differentiation and matching during probing. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> -----Original Message----- > From: David Miller [mailto:davem@davemloft.net] > Sent: Wednesday, September 17, 2014 12:56 PM > From: "Kweh, Hock Leong" <hock.leong.kweh@intel.com> > Date: Wed, 17 Sep 2014 02:41:39 +0000 > > > Thanks for the pointer. I did a quickly checking on the class number > > to see if I could use it for differentiation the ports number. Whereas > > I found them both have the same class number as well. Below shows the > > "lspci" dump to all the PCI devices on Quark X1000 Galileo board > > (Ethernet controllers are > > 00:14.6 and 00:14.7). Very unfortunately we are unlikely to use the > > class number as well as pci_device_id for the differentiation. > ... > > 00:14.6 "Class 0200" "8086" "0937" "8086" "0937" > > 00:14.7 "Class 0200" "8086" "0937" "8086" "0937" > > Are you kidding me? It's a perfect way to identify this device, it properly uses > PCI_CLASS_NETWORK_ETHERNET (0x0200) in both cases and this will not > match any other function on this PCI device at all. > > Please do as I suggested and use the PCI class for the differentiation and > matching during probing. Hi David, Thanks for your feedback so far. Appreciate it. Off the list because I think that my poorly written description may have caused some confusion. My sincere apology here. Unfortunately, I don't really grasp your idea clearly based on your responses which I appreciate them a lot. Sorry for the long description below but I hope to clearly pen down my thinking process so that you can follow my thinking incrementally without being confused. So, let's roll back a bit so that with my following description, you can help correct me if my understanding of using PCI function ID to differentiate PHY port that is associated with each Ethernet controller is wrong: The high-level idea about the change that I made for STMMAC IP inside Quark is as follow: (1) Based on Quark-specific PCI ID declared inside stmmac_id_table[], the probe() function is called to continue setting-up STMMAC for Quark. @@ -228,11 +303,13 @@ static int stmmac_pci_resume(struct pci_dev *pdev) #define STMMAC_VENDOR_ID 0x700 #define STMMAC_DEVICE_ID 0x1108 +#define STMMAC_QUARK_X1000_ID 0x0937 static const struct pci_device_id stmmac_id_table[] = { {PCI_DEVICE(STMMAC_VENDOR_ID, STMMAC_DEVICE_ID), PCI_ANY_ID, PCI_ANY_ID, CHIP_STMICRO}, {PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_MAC), CHIP_STMICRO}, + {PCI_VDEVICE(INTEL, STMMAC_QUARK_X1000_ID), CHIP_QUARK_X1000}, {} }; (2) Back-ground on STMMAC hardware configuration on Intel Galileo Gen 1 & Gen 2 platforms: Intel Quark SoC has 2 MAC controller as described by lspci output below: 00:14.6 Class 0200: 8086:0937 ====> 1st MAC controller 00:14.7 Class 0200: 8086:0937 ====> 2nd MAC controller These Galileo boards use the same Intel Quark SoC and there is only one PHY connect to the 1st MAC [00:14.6 Class 0200: 8086:0937] The 2nd MAC [00:14.7 Class 0200: 8086:0937] is NOT connected to any PHY at all. So, it appears to me that the only way that I can differentiate between 1st & 2nd MAC are based on PCI function ID, i.e. 14.6 & 14.7. Therefore, within the probe() function, for Intel Quark SoC only, the function performs next-level discovery of 1st or 2nd MAC controller through quark_run_time_config() function. For other PCI ID (currently STMICRO_MAC) there is NO next-level discovery involved as rt_config is NULL. Changes shown below: static struct platform_data platform_info[] = { @@ -59,15 +65,76 @@ static struct platform_data platform_info[] = { .phy_reset = NULL, .phy_mask = 0, .pbl = 32, + .fixed_burst = 0, .burst_len = DMA_AXI_BLEN_256, + .rt_config = NULL, ===================> no 2nd-level discovery for other PCI ID + }, + [CHIP_QUARK_X1000] = { + .phy_addr = 1, + .interface = PHY_INTERFACE_MODE_RMII, + .clk_csr = 2, + .has_gmac = 1, + .force_sf_dma_mode = 1, + .multicast_filter_bins = HASH_TABLE_SIZE, + .unicast_filter_entries = 1, + .phy_reset = NULL, + .phy_mask = 0, + .pbl = 16, + .fixed_burst = 1, + .burst_len = DMA_AXI_BLEN_256, + .rt_config = &quark_run_time_config, ==========> Quark specific 2nd-level discovery + }, +}; (3) Within quark_run_time_config(), due to the only way to differentiate 1st or 2nd MAC controller according to difference in function ID explained above, the following changes are made: +static void quark_run_time_config(int chip_id, struct pci_dev *pdev) { + const char *board_name = dmi_get_system_info(DMI_BOARD_NAME); + int i; + int func_num = PCI_FUNC(pdev->devfn); + + if (!board_name) + return; + + for (i = 0; i < ARRAY_SIZE(quark_x1000_phy_info); i++) { + if ((!strcmp(quark_x1000_phy_info[i].board_name, board_name)) && + quark_x1000_phy_info[i].pci_func_num == func_num) + platform_info[chip_id].phy_addr = + quark_x1000_phy_info[i].phy_address; + } +} The reasons for the above proposed condition checks, i.e. "board name" & "pci function name" are below: a) As described above, the only difference in both instance of STMMAC IP inside Intel Quark SoC is the function ID, so I have proposed to use function ID to be the decision point here to differentiate 1st MAC from 2nd MAC. b) Allow future expansion of any other Intel Quark platforms with specific need to fix PHY address c) A PHY address set as "-1" is to mark that the PHY (associated with function ID) is not connected to MAC, which is being used here for the 2 Galileo boards -> 2nd MAC port not connected with PHY. Finally, based on the above description, it appears to me that using PCI function ID to decode seems viable for Intel Quark specific hardware configuration. Appreciate your time and any feedback is very much appreciated. Thanks. Regards, Wilson -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
I'm not discussing things in private email, keep the discussion on-list so that any developer, not just me, can answer you. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c index 35fc884..4fae23f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c @@ -24,14 +24,18 @@ *******************************************************************************/ #include <linux/pci.h> +#include <linux/dmi.h> #include "stmmac.h" +static void quark_run_time_config(int chip_id, struct pci_dev *pdev); + enum chip { CHIP_STMICRO = 0, + CHIP_QUARK_X1000, }; -/* A struct for platform specific information which will be - * used in stmmac_default_data function for initialization +/* A struct for platform specific information which is used + * in stmmac_default_data function for initialization */ struct platform_data { int phy_addr; @@ -44,7 +48,9 @@ struct platform_data { int (*phy_reset)(void *priv); unsigned int phy_mask; int pbl; + int fixed_burst; int burst_len; + void (*rt_config)(int chip_id, struct pci_dev *pdev); }; static struct platform_data platform_info[] = { @@ -59,15 +65,76 @@ static struct platform_data platform_info[] = { .phy_reset = NULL, .phy_mask = 0, .pbl = 32, + .fixed_burst = 0, .burst_len = DMA_AXI_BLEN_256, + .rt_config = NULL, + }, + [CHIP_QUARK_X1000] = { + .phy_addr = 1, + .interface = PHY_INTERFACE_MODE_RMII, + .clk_csr = 2, + .has_gmac = 1, + .force_sf_dma_mode = 1, + .multicast_filter_bins = HASH_TABLE_SIZE, + .unicast_filter_entries = 1, + .phy_reset = NULL, + .phy_mask = 0, + .pbl = 16, + .fixed_burst = 1, + .burst_len = DMA_AXI_BLEN_256, + .rt_config = &quark_run_time_config, + }, +}; + +/* This struct is used to associate PCI Function ID of MAC controller + * on a board, discovered via DMI, with phy_address. It is also used + * to describe if that MAC controller is connected with PHY. + */ +struct intel_quark_platform { + int pci_func_num; + const char *board_name; + int phy_address; +}; + +static struct intel_quark_platform quark_x1000_phy_info[] = { + { + .pci_func_num = 7, + .board_name = "Galileo", + /* Galileo ethernet port 2 does not connect to any PHY */ + .phy_address = -1, + }, + { + .pci_func_num = 7, + .board_name = "GalileoGen2", + /* Galileo Gen2 ethernet port 2 does not connect to any PHY */ + .phy_address = -1, }, }; -static void stmmac_default_data(struct plat_stmmacenet_data *plat, - int chip_id, struct pci_dev *pdev) +static void quark_run_time_config(int chip_id, struct pci_dev *pdev) +{ + const char *board_name = dmi_get_system_info(DMI_BOARD_NAME); + int i; + int func_num = PCI_FUNC(pdev->devfn); + + if (!board_name) + return; + + for (i = 0; i < ARRAY_SIZE(quark_x1000_phy_info); i++) { + if ((!strcmp(quark_x1000_phy_info[i].board_name, board_name)) && + quark_x1000_phy_info[i].pci_func_num == func_num) + platform_info[chip_id].phy_addr = + quark_x1000_phy_info[i].phy_address; + } +} + +static int stmmac_default_data(struct plat_stmmacenet_data *plat, + int chip_id, struct pci_dev *pdev) { struct platform_data *chip_plat_dat = &platform_info[chip_id]; + if (chip_plat_dat->rt_config) + chip_plat_dat->rt_config(chip_id, pdev); plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn); plat->phy_addr = chip_plat_dat->phy_addr; plat->interface = chip_plat_dat->interface; @@ -82,7 +149,13 @@ static void stmmac_default_data(struct plat_stmmacenet_data *plat, plat->mdio_bus_data->phy_mask = chip_plat_dat->phy_mask; plat->dma_cfg->pbl = chip_plat_dat->pbl; + plat->dma_cfg->fixed_burst = chip_plat_dat->fixed_burst; plat->dma_cfg->burst_len = chip_plat_dat->burst_len; + + /* Refuse to load the driver and register net device + * if MAC controller does not connect to any PHY interface + */ + return (plat->phy_addr != -1) ? 0 : -ENODEV; } /** @@ -156,7 +229,9 @@ static int stmmac_pci_probe(struct pci_dev *pdev, goto err_out; } - stmmac_default_data(plat_dat, id->driver_data, pdev); + ret = stmmac_default_data(plat_dat, id->driver_data, pdev); + if (ret) + goto err_out; priv = stmmac_dvr_probe(&pdev->dev, plat_dat, addr); if (IS_ERR(priv)) { @@ -228,11 +303,13 @@ static int stmmac_pci_resume(struct pci_dev *pdev) #define STMMAC_VENDOR_ID 0x700 #define STMMAC_DEVICE_ID 0x1108 +#define STMMAC_QUARK_X1000_ID 0x0937 static const struct pci_device_id stmmac_id_table[] = { {PCI_DEVICE(STMMAC_VENDOR_ID, STMMAC_DEVICE_ID), PCI_ANY_ID, PCI_ANY_ID, CHIP_STMICRO}, {PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_MAC), CHIP_STMICRO}, + {PCI_VDEVICE(INTEL, STMMAC_QUARK_X1000_ID), CHIP_QUARK_X1000}, {} };