diff mbox

mtd: spi-nor: Add support for Fujitsu MB85RS1MT FRAM

Message ID 1410339230-13007-1-git-send-email-lisovy@merica.cz
State Accepted
Commit ce56ce7da3159176424dfad3307a5f6da44b3d64
Headers show

Commit Message

Rostislav Lisovy Sept. 10, 2014, 8:53 a.m. UTC
Tested with this particular FRAM chip

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
---
 drivers/mtd/spi-nor/spi-nor.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Marek Vasut Sept. 10, 2014, 2:55 p.m. UTC | #1
On Wednesday, September 10, 2014 at 10:53:50 AM, Rostislav Lisovy wrote:
> Tested with this particular FRAM chip
> 
> Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index b5ad6be..a914be9 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -505,6 +505,9 @@ const struct spi_device_id spi_nor_ids[] = {
>  	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE |
> SPI_NOR_NO_FR) }, { "mr25h10",  CAT25_INFO(128 * 1024, 1, 256, 3,
> SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
> 
> +	/* Fujitsu */
> +	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
> +
>  	/* GigaDevice */
>  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },

Looks OK,

Acked-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index b5ad6be..a914be9 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -505,6 +505,9 @@  const struct spi_device_id spi_nor_ids[] = {
 	{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
 	{ "mr25h10",  CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
 
+	/* Fujitsu */
+	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
+
 	/* GigaDevice */
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },