diff mbox

[ARM] Tune thumb1_size_rtx_costs

Message ID 000001cfccb8$48f1ab00$dad50100$@arm.com
State New
Headers show

Commit Message

Zhenqiang Chen Sept. 10, 2014, 5:30 a.m. UTC
Hi,

Currently most thumb1_size_rtx_costs are "guessed" from performance view,
not size.

The patch adjusts some of them according the instruction patterns defined in
thumb1.md. It also replaces several hard coded "4" to COSTS_N_INSNS (1).

No make check regression for Cortex-M0 on qemu.
For Cortex-M0 text code size, it reduces 0.15% for CSiBE, 0.59% for
coremark, 0.13% for dhrystone, 0.14% for eembc_v1 and 0.31% for eembc-v2.

OK for trunk?

Thanks!
-Zhenqiang

ChangeLog:
2014-09-10  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* config/arm/arm.c: #include "tm-constrs.h"
	(thumb1_size_rtx_costs): Adjust rtx costs.

     case CONST_INT:
       if (outer == SET)
@@ -8943,16 +8946,14 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code,
enum rtx_code outer)
     case AND:
     case XOR:
     case IOR:
-      /* XXX guess.  */
-      return 8;
+      return COSTS_N_INSNS (1);
 
     case MEM:
-      /* XXX another guess.  */
-      /* Memory costs quite a lot for the first word, but subsequent words
-         load at the equivalent of a single insn each.  */
-      return (10 + 4 * ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD)
+      return (COSTS_N_INSNS (1)
+	      + COSTS_N_INSNS (1)
+		* ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD)
               + ((GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P
(x))
-                 ? 4 : 0));
+                 ? COSTS_N_INSNS (1) : 0));
 
     case IF_THEN_ELSE:
       /* XXX a guess.  */

Comments

Ramana Radhakrishnan Sept. 18, 2014, 10:04 p.m. UTC | #1
On Wed, Sep 10, 2014 at 6:30 AM, Zhenqiang Chen <zhenqiang.chen@arm.com> wrote:
> Hi,
>
> Currently most thumb1_size_rtx_costs are "guessed" from performance view,
> not size.
>
> The patch adjusts some of them according the instruction patterns defined in
> thumb1.md. It also replaces several hard coded "4" to COSTS_N_INSNS (1).
>
> No make check regression for Cortex-M0 on qemu.
> For Cortex-M0 text code size, it reduces 0.15% for CSiBE, 0.59% for
> coremark, 0.13% for dhrystone, 0.14% for eembc_v1 and 0.31% for eembc-v2.
>
> OK for trunk?


OK.


Ramana

>
> Thanks!
> -Zhenqiang
>
> ChangeLog:
> 2014-09-10  Zhenqiang Chen  <zhenqiang.chen@arm.com>
>
>         * config/arm/arm.c: #include "tm-constrs.h"
>         (thumb1_size_rtx_costs): Adjust rtx costs.
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 11e0655..a19e15c 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -62,6 +62,7 @@
>  #include "dumpfile.h"
>  #include "gimple-expr.h"
>  #include "builtins.h"
> +#include "tm-constrs.h"
>
>  /* Forward definitions of types.  */
>  typedef struct minipool_node    Mnode;
> @@ -8888,9 +8889,11 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code,
> enum rtx_code outer)
>        /* A SET doesn't have a mode, so let's look at the SET_DEST to get
>          the mode.  */
>        words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x))));
> -      return (COSTS_N_INSNS (words)
> -              + 4 * ((MEM_P (SET_SRC (x)))
> -                     + MEM_P (SET_DEST (x))));
> +      return COSTS_N_INSNS (words)
> +            + COSTS_N_INSNS (1) * (satisfies_constraint_J (SET_SRC (x))
> +                                   || satisfies_constraint_K (SET_SRC (x))
> +                                      /* thumb1_movdi_insn.  */
> +                                   || ((words > 1) && MEM_P (SET_SRC
> (x))));
>
>      case CONST_INT:
>        if (outer == SET)
> @@ -8943,16 +8946,14 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code,
> enum rtx_code outer)
>      case AND:
>      case XOR:
>      case IOR:
> -      /* XXX guess.  */
> -      return 8;
> +      return COSTS_N_INSNS (1);
>
>      case MEM:
> -      /* XXX another guess.  */
> -      /* Memory costs quite a lot for the first word, but subsequent words
> -         load at the equivalent of a single insn each.  */
> -      return (10 + 4 * ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD)
> +      return (COSTS_N_INSNS (1)
> +             + COSTS_N_INSNS (1)
> +               * ((GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD)
>                + ((GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P
> (x))
> -                 ? 4 : 0));
> +                 ? COSTS_N_INSNS (1) : 0));
>
>      case IF_THEN_ELSE:
>        /* XXX a guess.  */
>
>
>
diff mbox

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11e0655..a19e15c 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -62,6 +62,7 @@ 
 #include "dumpfile.h"
 #include "gimple-expr.h"
 #include "builtins.h"
+#include "tm-constrs.h"
 
 /* Forward definitions of types.  */
 typedef struct minipool_node    Mnode;
@@ -8888,9 +8889,11 @@  thumb1_size_rtx_costs (rtx x, enum rtx_code code,
enum rtx_code outer)
       /* A SET doesn't have a mode, so let's look at the SET_DEST to get
 	 the mode.  */
       words = ARM_NUM_INTS (GET_MODE_SIZE (GET_MODE (SET_DEST (x))));
-      return (COSTS_N_INSNS (words)
-              + 4 * ((MEM_P (SET_SRC (x)))
-                     + MEM_P (SET_DEST (x))));
+      return COSTS_N_INSNS (words)
+	     + COSTS_N_INSNS (1) * (satisfies_constraint_J (SET_SRC (x))
+				    || satisfies_constraint_K (SET_SRC (x))
+				       /* thumb1_movdi_insn.  */
+				    || ((words > 1) && MEM_P (SET_SRC
(x))));