@@ -385,3 +385,140 @@
MK_PTR(MK_STRUCT(STRUCT_rtentry)))
IOCTL_SPECIAL(SIOCDELRT, IOC_W, do_ioctl_rt,
MK_PTR(MK_STRUCT(STRUCT_rtentry)))
+
+ IOCTL(DRM_IOCTL_VERSION, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_version)))
+ IOCTL(DRM_IOCTL_GET_UNIQUE, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_unique)))
+ IOCTL(DRM_IOCTL_GET_MAGIC, IOC_R, MK_PTR(MK_STRUCT(STRUCT_drm_auth)))
+ IOCTL(DRM_IOCTL_IRQ_BUSID, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_irq_busid)))
+ IOCTL(DRM_IOCTL_GET_MAP, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_map)))
+ IOCTL(DRM_IOCTL_GET_CLIENT, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_client)))
+ IOCTL(DRM_IOCTL_GET_STATS, IOC_R, MK_PTR(MK_STRUCT(STRUCT_drm_stats)))
+ IOCTL(DRM_IOCTL_SET_VERSION, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_set_version)))
+ IOCTL(DRM_IOCTL_MODESET_CTL, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_modeset_ctl)))
+ IOCTL(DRM_IOCTL_GEM_CLOSE, IOC_W , MK_PTR(MK_STRUCT(STRUCT_drm_gem_close)))
+ IOCTL(DRM_IOCTL_GEM_FLINK, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_gem_flink)))
+ IOCTL(DRM_IOCTL_GEM_OPEN, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_gem_open)))
+ IOCTL(DRM_IOCTL_GET_CAP, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_get_cap)))
+ IOCTL(DRM_IOCTL_SET_CLIENT_CAP, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_set_client_cap)))
+ IOCTL(DRM_IOCTL_SET_UNIQUE, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_unique)))
+ IOCTL(DRM_IOCTL_AUTH_MAGIC, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_auth)))
+ IOCTL(DRM_IOCTL_BLOCK, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_block)))
+ IOCTL(DRM_IOCTL_UNBLOCK, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_block)))
+ IOCTL(DRM_IOCTL_CONTROL, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_control)))
+ IOCTL(DRM_IOCTL_ADD_MAP, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_map)))
+ IOCTL(DRM_IOCTL_ADD_BUFS, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_buf_desc)))
+ IOCTL(DRM_IOCTL_MARK_BUFS, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_buf_desc)))
+ IOCTL(DRM_IOCTL_INFO_BUFS, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_buf_info)))
+ IOCTL(DRM_IOCTL_MAP_BUFS, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_buf_map)))
+ IOCTL(DRM_IOCTL_FREE_BUFS, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_buf_free)))
+ IOCTL(DRM_IOCTL_RM_MAP, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_map)))
+ IOCTL(DRM_IOCTL_SET_SAREA_CTX, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_ctx_priv_map)))
+ IOCTL(DRM_IOCTL_GET_SAREA_CTX, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_ctx_priv_map)))
+ IOCTL(DRM_IOCTL_SET_MASTER, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_DROP_MASTER, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_ADD_CTX, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_RM_CTX, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_MOD_CTX, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_GET_CTX, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_SWITCH_CTX, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_NEW_CTX, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_ctx)))
+ IOCTL(DRM_IOCTL_RES_CTX, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_ctx_res)))
+ IOCTL(DRM_IOCTL_ADD_DRAW, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_draw)))
+ IOCTL(DRM_IOCTL_RM_DRAW, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_draw)))
+ IOCTL(DRM_IOCTL_DMA, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_dma)))
+ IOCTL(DRM_IOCTL_LOCK, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_lock)))
+ IOCTL(DRM_IOCTL_UNLOCK, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_lock)))
+ IOCTL(DRM_IOCTL_FINISH, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_lock)))
+ IOCTL(DRM_IOCTL_PRIME_HANDLE_TO_FD, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_prime_handle)))
+ IOCTL(DRM_IOCTL_PRIME_FD_TO_HANDLE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_prime_handle)))
+ IOCTL(DRM_IOCTL_AGP_ACQUIRE, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_AGP_RELEASE, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_AGP_ENABLE, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_agp_mode)))
+ IOCTL(DRM_IOCTL_AGP_INFO, IOC_R, MK_PTR(MK_STRUCT(STRUCT_drm_agp_info)))
+ IOCTL(DRM_IOCTL_AGP_ALLOC, IOC_RW, MK_PTR(MK_STRUCT(STRUCT_drm_agp_buffer)))
+ IOCTL(DRM_IOCTL_AGP_FREE, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_agp_buffer)))
+ IOCTL(DRM_IOCTL_AGP_BIND, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_agp_binding)))
+ IOCTL(DRM_IOCTL_AGP_UNBIND, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_agp_binding)))
+ IOCTL(DRM_IOCTL_SG_ALLOC, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_scatter_gather)))
+ IOCTL(DRM_IOCTL_SG_FREE, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_scatter_gather)))
+ IOCTL(DRM_IOCTL_WAIT_VBLANK, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_wait_vblank_reply)))
+ IOCTL(DRM_IOCTL_UPDATE_DRAW, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_update_draw)))
+ IOCTL(DRM_IOCTL_MODE_GETRESOURCES, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_card_res)))
+ IOCTL(DRM_IOCTL_MODE_GETCRTC, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_crtc)))
+ IOCTL(DRM_IOCTL_MODE_SETCRTC, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_crtc)))
+ IOCTL(DRM_IOCTL_MODE_CURSOR, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_cursor)))
+ IOCTL(DRM_IOCTL_MODE_GETGAMMA, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_crtc_lut)))
+ IOCTL(DRM_IOCTL_MODE_SETGAMMA, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_crtc_lut)))
+ IOCTL(DRM_IOCTL_MODE_GETENCODER, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_encoder)))
+ IOCTL(DRM_IOCTL_MODE_GETCONNECTOR, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_connector)))
+ IOCTL(DRM_IOCTL_MODE_ATTACHMODE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_mode_cmd)))
+ IOCTL(DRM_IOCTL_MODE_DETACHMODE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_mode_cmd)))
+ IOCTL(DRM_IOCTL_MODE_GETPROPERTY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_property)))
+ IOCTL(DRM_IOCTL_MODE_SETPROPERTY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_connector_set_property)))
+ IOCTL(DRM_IOCTL_MODE_GETPROPBLOB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_blob)))
+ IOCTL(DRM_IOCTL_MODE_GETFB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_fb_cmd)))
+ IOCTL(DRM_IOCTL_MODE_ADDFB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_fb_cmd)))
+ IOCTL(DRM_IOCTL_MODE_RMFB, IOC_RW, TYPE_INT)
+ IOCTL(DRM_IOCTL_MODE_PAGE_FLIP, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_crtc_page_flip)))
+ IOCTL(DRM_IOCTL_MODE_DIRTYFB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_fb_dirty_cmd)))
+ IOCTL(DRM_IOCTL_MODE_CREATE_DUMB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_create_dumb)))
+ IOCTL(DRM_IOCTL_MODE_MAP_DUMB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_map_dumb)))
+ IOCTL(DRM_IOCTL_MODE_DESTROY_DUMB, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_destroy_dumb)))
+ IOCTL(DRM_IOCTL_MODE_GETPLANERESOURCES, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_plane_res)))
+ IOCTL(DRM_IOCTL_MODE_GETPLANE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_get_plane)))
+ IOCTL(DRM_IOCTL_MODE_SETPLANE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_set_plane)))
+ IOCTL(DRM_IOCTL_MODE_ADDFB2, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_fb_cmd2)))
+ IOCTL(DRM_IOCTL_MODE_OBJ_GETPROPERTIES, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_obj_get_properties)))
+ IOCTL(DRM_IOCTL_MODE_OBJ_SETPROPERTY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_obj_set_property)))
+ IOCTL(DRM_IOCTL_MODE_CURSOR2, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_mode_cursor2)))
+
+ IOCTL(DRM_IOCTL_I915_INIT, IOC_W, MK_PTR(MK_STRUCT(STRUCT_drm_i915_init_t)))
+ IOCTL(DRM_IOCTL_I915_FLUSH, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_I915_FLIP, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_I915_BATCHBUFFER, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_batchbuffer_t)))
+ IOCTL(DRM_IOCTL_I915_IRQ_EMIT, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_irq_emit_t)))
+ IOCTL(DRM_IOCTL_I915_IRQ_WAIT, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_irq_wait_t)))
+ IOCTL(DRM_IOCTL_I915_GETPARAM, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_getparam_t)))
+ IOCTL(DRM_IOCTL_I915_SETPARAM, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_setparam_t)))
+ IOCTL(DRM_IOCTL_I915_ALLOC, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_mem_alloc_t)))
+ IOCTL(DRM_IOCTL_I915_FREE, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_mem_free_t)))
+ IOCTL(DRM_IOCTL_I915_INIT_HEAP, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_mem_init_heap_t)))
+ IOCTL(DRM_IOCTL_I915_CMDBUFFER, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_cmdbuffer_t)))
+ IOCTL(DRM_IOCTL_I915_DESTROY_HEAP, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_mem_destroy_heap_t)))
+ IOCTL(DRM_IOCTL_I915_SET_VBLANK_PIPE, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_vblank_pipe_t)))
+ IOCTL(DRM_IOCTL_I915_GET_VBLANK_PIPE, IOC_R,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_vblank_pipe_t)))
+ IOCTL(DRM_IOCTL_I915_VBLANK_SWAP , IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_vblank_swap_t)))
+ IOCTL(DRM_IOCTL_I915_HWS_ADDR, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_init)))
+ IOCTL(DRM_IOCTL_I915_GEM_INIT, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_init)))
+ IOCTL(DRM_IOCTL_I915_GEM_EXECBUFFER, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_execbuffer)))
+ IOCTL(DRM_IOCTL_I915_GEM_PIN, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_pin)))
+ IOCTL(DRM_IOCTL_I915_GEM_UNPIN, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_unpin)))
+ IOCTL(DRM_IOCTL_I915_GEM_BUSY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_busy)))
+ IOCTL(DRM_IOCTL_I915_GEM_THROTTLE, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_I915_GEM_ENTERVT, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_I915_GEM_LEAVEVT, 0, TYPE_NULL)
+ IOCTL(DRM_IOCTL_I915_GEM_CREATE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_create)))
+ IOCTL(DRM_IOCTL_I915_GEM_PREAD, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_pread)))
+ IOCTL(DRM_IOCTL_I915_GEM_PWRITE, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_pwrite)))
+ IOCTL(DRM_IOCTL_I915_GEM_MMAP, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_mmap)))
+ IOCTL(DRM_IOCTL_I915_GEM_MMAP_GTT, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_mmap_gtt)))
+ IOCTL(DRM_IOCTL_I915_GEM_SET_DOMAIN, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_set_domain)))
+ IOCTL(DRM_IOCTL_I915_GEM_SW_FINISH, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_sw_finish)))
+ IOCTL(DRM_IOCTL_I915_GEM_SET_TILING, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_set_tiling)))
+ IOCTL(DRM_IOCTL_I915_GEM_GET_TILING, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_get_tiling)))
+ IOCTL(DRM_IOCTL_I915_GEM_GET_APERTURE, IOC_R,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_get_aperture)))
+ IOCTL(DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_get_pipe_from_crtc_id)))
+ IOCTL(DRM_IOCTL_I915_GEM_MADVISE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_madvise)))
+ IOCTL(DRM_IOCTL_I915_OVERLAY_PUT_IMAGE, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_intel_overlay_put_image)))
+ IOCTL(DRM_IOCTL_I915_OVERLAY_ATTRS, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_intel_overlay_attrs)))
+ IOCTL(DRM_IOCTL_I915_GEM_EXECBUFFER2, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_execbuffer2)))
+ IOCTL(DRM_IOCTL_I915_SET_SPRITE_COLORKEY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_intel_sprite_colorkey)))
+ IOCTL(DRM_IOCTL_I915_GET_SPRITE_COLORKEY, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_intel_sprite_colorkey)))
+ IOCTL(DRM_IOCTL_I915_GEM_WAIT, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_wait)))
+ IOCTL(DRM_IOCTL_I915_GEM_CONTEXT_CREATE, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_context_create)))
+ IOCTL(DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_context_destroy)))
+ IOCTL(DRM_IOCTL_I915_GEM_SET_CACHING, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_caching)))
+ IOCTL(DRM_IOCTL_I915_GEM_GET_CACHING, IOC_W,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_caching)))
+ IOCTL(DRM_IOCTL_I915_REG_READ, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_reg_read)))
+ IOCTL(DRM_IOCTL_I915_GET_RESET_STATS, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_reset_stats)))
+ IOCTL(DRM_IOCTL_I915_GEM_USERPTR, IOC_RW,
MK_PTR(MK_STRUCT(STRUCT_drm_i915_gem_userptr)))
@@ -90,6 +90,8 @@ int __clone2(int (*fn)(void *), void *child_stack_base,
#define tchars host_tchars /* same as target */
#define ltchars host_ltchars /* same as target */
+#include <drm/drm.h>
+#include <drm/i915_drm.h>
#include <linux/termios.h>
#include <linux/unistd.h>
#include <linux/cdrom.h>
@@ -2329,6 +2329,145 @@ struct target_f_owner_ex {
int pid; /* ID of owner. */
};
+/* drm defines */
+#define TARGET_DRM_IOCTL_VERSION
TARGET_IOWR('d', 0x00, struct drm_version)
+#define TARGET_DRM_IOCTL_GET_UNIQUE
TARGET_IOWR('d', 0x01, struct drm_unique)
+#define TARGET_DRM_IOCTL_GET_MAGIC TARGET_IOR('d',
0x02, struct drm_auth)
+#define TARGET_DRM_IOCTL_IRQ_BUSID
TARGET_IOWR('d', 0x03, struct drm_irq_busid)
+#define TARGET_DRM_IOCTL_GET_MAP
TARGET_IOWR('d', 0x04, struct drm_map)
+#define TARGET_DRM_IOCTL_GET_CLIENT
TARGET_IOWR('d', 0x05, struct drm_client)
+#define TARGET_DRM_IOCTL_GET_STATS TARGET_IOR('d',
0x06, struct drm_stats)
+#define TARGET_DRM_IOCTL_SET_VERSION
TARGET_IOWR('d', 0x07, struct drm_set_version)
+#define TARGET_DRM_IOCTL_MODESET_CTL TARGET_IOW('d',
0x08, struct drm_modeset_ctl)
+#define TARGET_DRM_IOCTL_GEM_CLOSE TARGET_IOW('d',
0x09, struct drm_gem_close)
+#define TARGET_DRM_IOCTL_GEM_FLINK
TARGET_IOWR('d', 0x0a, struct drm_gem_flink)
+#define TARGET_DRM_IOCTL_GEM_OPEN
TARGET_IOWR('d', 0x0b, struct drm_gem_open)
+#define TARGET_DRM_IOCTL_GET_CAP
TARGET_IOWR('d', 0x0c, struct drm_get_cap)
+#define TARGET_DRM_IOCTL_SET_CLIENT_CAP
TARGET_IOWR('d', 0x0d, struct drm_set_client_cap)
+#define TARGET_DRM_IOCTL_SET_UNIQUE TARGET_IOW('d',
0x10, struct drm_unique)
+#define TARGET_DRM_IOCTL_AUTH_MAGIC TARGET_IOW('d',
0x11, struct drm_auth)
+#define TARGET_DRM_IOCTL_BLOCK
TARGET_IOWR('d', 0x12, struct drm_block)
+#define TARGET_DRM_IOCTL_UNBLOCK
TARGET_IOWR('d', 0x13, struct drm_block)
+#define TARGET_DRM_IOCTL_CONTROL TARGET_IOW('d',
0x14, struct drm_control)
+#define TARGET_DRM_IOCTL_ADD_MAP
TARGET_IOWR('d', 0x15, struct drm_map)
+#define TARGET_DRM_IOCTL_ADD_BUFS
TARGET_IOWR('d', 0x16, struct drm_buf_desc)
+#define TARGET_DRM_IOCTL_MARK_BUFS TARGET_IOW('d',
0x17, struct drm_buf_desc)
+#define TARGET_DRM_IOCTL_INFO_BUFS
TARGET_IOWR('d', 0x18, struct drm_buf_info)
+#define TARGET_DRM_IOCTL_MAP_BUFS
TARGET_IOWR('d', 0x19, struct drm_buf_map)
+#define TARGET_DRM_IOCTL_FREE_BUFS TARGET_IOW('d',
0x1a, struct drm_buf_free)
+#define TARGET_DRM_IOCTL_RM_MAP TARGET_IOW('d',
0x1b, struct drm_map)
+#define TARGET_DRM_IOCTL_SET_SAREA_CTX TARGET_IOW('d',
0x1c, struct drm_ctx_priv_map)
+#define TARGET_DRM_IOCTL_GET_SAREA_CTX
TARGET_IOWR('d', 0x1d, struct drm_ctx_priv_map)
+#define TARGET_DRM_IOCTL_SET_MASTER TARGET_IO('d', 0x1e)
+#define TARGET_DRM_IOCTL_DROP_MASTER TARGET_IO('d', 0x1f)
+#define TARGET_DRM_IOCTL_ADD_CTX
TARGET_IOWR('d', 0x20, struct drm_ctx)
+#define TARGET_DRM_IOCTL_RM_CTX
TARGET_IOWR('d', 0x21, struct drm_ctx)
+#define TARGET_DRM_IOCTL_MOD_CTX TARGET_IOW('d',
0x22, struct drm_ctx)
+#define TARGET_DRM_IOCTL_GET_CTX
TARGET_IOWR('d', 0x23, struct drm_ctx)
+#define TARGET_DRM_IOCTL_SWITCH_CTX TARGET_IOW('d',
0x24, struct drm_ctx)
+#define TARGET_DRM_IOCTL_NEW_CTX TARGET_IOW('d',
0x25, struct drm_ctx)
+#define TARGET_DRM_IOCTL_RES_CTX
TARGET_IOWR('d', 0x26, struct drm_ctx_res)
+#define TARGET_DRM_IOCTL_ADD_DRAW
TARGET_IOWR('d', 0x27, struct drm_draw)
+#define TARGET_DRM_IOCTL_RM_DRAW
TARGET_IOWR('d', 0x28, struct drm_draw)
+#define TARGET_DRM_IOCTL_DMA
TARGET_IOWR('d', 0x29, struct drm_dma)
+#define TARGET_DRM_IOCTL_LOCK TARGET_IOW('d',
0x2a, struct drm_lock)
+#define TARGET_DRM_IOCTL_UNLOCK TARGET_IOW('d',
0x2b, struct drm_lock)
+#define TARGET_DRM_IOCTL_FINISH TARGET_IOW('d',
0x2c, struct drm_lock)
+#define TARGET_DRM_IOCTL_PRIME_HANDLE_TO_FD
TARGET_IOWR('d', 0x2d, struct drm_prime_handle)
+#define TARGET_DRM_IOCTL_PRIME_FD_TO_HANDLE
TARGET_IOWR('d', 0x2e, struct drm_prime_handle)
+#define TARGET_DRM_IOCTL_AGP_ACQUIRE TARGET_IO('d', 0x30)
+#define TARGET_DRM_IOCTL_AGP_RELEASE TARGET_IO('d', 0x31)
+#define TARGET_DRM_IOCTL_AGP_ENABLE TARGET_IOW('d',
0x32, struct drm_agp_mode)
+#define TARGET_DRM_IOCTL_AGP_INFO TARGET_IOR('d',
0x33, struct drm_agp_info)
+#define TARGET_DRM_IOCTL_AGP_ALLOC
TARGET_IOWR('d', 0x34, struct drm_agp_buffer)
+#define TARGET_DRM_IOCTL_AGP_FREE TARGET_IOW('d',
0x35, struct drm_agp_buffer)
+#define TARGET_DRM_IOCTL_AGP_BIND TARGET_IOW('d',
0x36, struct drm_agp_binding)
+#define TARGET_DRM_IOCTL_AGP_UNBIND TARGET_IOW('d',
0x37, struct drm_agp_binding)
+#define TARGET_DRM_IOCTL_SG_ALLOC
TARGET_IOWR('d', 0x38, struct drm_scatter_gather)
+#define TARGET_DRM_IOCTL_SG_FREE TARGET_IOW('d',
0x39, struct drm_scatter_gather)
+#define TARGET_DRM_IOCTL_WAIT_VBLANK
TARGET_IOWR('d', 0x3a, union drm_wait_vblank)
+#define TARGET_DRM_IOCTL_UPDATE_DRAW TARGET_IOW('d',
0x3f, struct drm_update_draw)
+#define TARGET_DRM_IOCTL_MODE_GETRESOURCES
TARGET_IOWR('d', 0xa0, struct drm_mode_card_res)
+#define TARGET_DRM_IOCTL_MODE_GETCRTC
TARGET_IOWR('d', 0xa1, struct drm_mode_crtc)
+#define TARGET_DRM_IOCTL_MODE_SETCRTC
TARGET_IOWR('d', 0xa2, struct drm_mode_crtc)
+#define TARGET_DRM_IOCTL_MODE_CURSOR
TARGET_IOWR('d', 0xa3, struct drm_mode_cursor)
+#define TARGET_DRM_IOCTL_MODE_GETGAMMA
TARGET_IOWR('d', 0xa4, struct drm_mode_crtc_lut)
+#define TARGET_DRM_IOCTL_MODE_SETGAMMA
TARGET_IOWR('d', 0xa5, struct drm_mode_crtc_lut)
+#define TARGET_DRM_IOCTL_MODE_GETENCODER
TARGET_IOWR('d', 0xa6, struct drm_mode_get_encoder)
+#define TARGET_DRM_IOCTL_MODE_GETCONNECTOR
TARGET_IOWR('d', 0xa7, struct drm_mode_get_connector)
+#define TARGET_DRM_IOCTL_MODE_ATTACHMODE
TARGET_IOWR('d', 0xa8, struct drm_mode_mode_cmd)
+#define TARGET_DRM_IOCTL_MODE_DETACHMODE
TARGET_IOWR('d', 0xa9, struct drm_mode_mode_cmd)
+#define TARGET_DRM_IOCTL_MODE_GETPROPERTY
TARGET_IOWR('d', 0xaa, struct drm_mode_get_property)
+#define TARGET_DRM_IOCTL_MODE_SETPROPERTY
TARGET_IOWR('d', 0xab, struct drm_mode_connector_set_property)
+#define TARGET_DRM_IOCTL_MODE_GETPROPBLOB
TARGET_IOWR('d', 0xac, struct drm_mode_get_blob)
+#define TARGET_DRM_IOCTL_MODE_GETFB
TARGET_IOWR('d', 0xad, struct drm_mode_fb_cmd)
+#define TARGET_DRM_IOCTL_MODE_ADDFB
TARGET_IOWR('d', 0xae, struct drm_mode_fb_cmd)
+#define TARGET_DRM_IOCTL_MODE_RMFB
TARGET_IOWR('d', 0xaf, unsigned int)
+#define TARGET_DRM_IOCTL_MODE_PAGE_FLIP
TARGET_IOWR('d', 0xb0, struct drm_mode_crtc_page_flip)
+#define TARGET_DRM_IOCTL_MODE_DIRTYFB
TARGET_IOWR('d', 0xb1, struct drm_mode_fb_dirty_cmd)
+#define TARGET_DRM_IOCTL_MODE_CREATE_DUMB
TARGET_IOWR('d', 0xb2, struct drm_mode_create_dumb)
+#define TARGET_DRM_IOCTL_MODE_MAP_DUMB
TARGET_IOWR('d', 0xb3, struct drm_mode_map_dumb)
+#define TARGET_DRM_IOCTL_MODE_DESTROY_DUMB
TARGET_IOWR('d', 0xb4, struct drm_mode_destroy_dumb)
+#define TARGET_DRM_IOCTL_MODE_GETPLANERESOURCES
TARGET_IOWR('d', 0xb5, struct drm_mode_get_plane_res)
+#define TARGET_DRM_IOCTL_MODE_GETPLANE
TARGET_IOWR('d', 0xb6, struct drm_mode_get_plane)
+#define TARGET_DRM_IOCTL_MODE_SETPLANE
TARGET_IOWR('d', 0xb7, struct drm_mode_set_plane)
+#define TARGET_DRM_IOCTL_MODE_ADDFB2
TARGET_IOWR('d', 0xb8, struct drm_mode_fb_cmd2)
+#define TARGET_DRM_IOCTL_MODE_OBJ_GETPROPERTIES
TARGET_IOWR('d', 0xb9, struct drm_mode_obj_get_properties)
+#define TARGET_DRM_IOCTL_MODE_OBJ_SETPROPERTY
TARGET_IOWR('d', 0xba, struct drm_mode_obj_set_property)
+#define TARGET_DRM_IOCTL_MODE_CURSOR2
TARGET_IOWR('d', 0xbb, struct drm_mode_cursor2)
+
+/* i915 drm defines */
+#define TARGET_DRM_IOCTL_I915_INIT TARGET_IOW('d',
0x40, drm_i915_init_t)
+#define TARGET_DRM_IOCTL_I915_FLUSH TARGET_IO('d', 0x41)
+#define TARGET_DRM_IOCTL_I915_FLIP TARGET_IO('d', 0x42)
+#define TARGET_DRM_IOCTL_I915_BATCHBUFFER TARGET_IOW('d',
0x43, drm_i915_batchbuffer_t)
+#define TARGET_DRM_IOCTL_I915_IRQ_EMIT
TARGET_IOWR('d', 0x44, drm_i915_irq_emit_t)
+#define TARGET_DRM_IOCTL_I915_IRQ_WAIT TARGET_IOW('d',
0x45, drm_i915_irq_wait_t)
+#define TARGET_DRM_IOCTL_I915_GETPARAM
TARGET_IOWR('d', 0x46, drm_i915_getparam_t)
+#define TARGET_DRM_IOCTL_I915_SETPARAM TARGET_IOW('d',
0x47, drm_i915_setparam_t)
+#define TARGET_DRM_IOCTL_I915_ALLOC
TARGET_IOWR('d', 0x48, drm_i915_mem_alloc_t)
+#define TARGET_DRM_IOCTL_I915_FREE TARGET_IOW('d',
0x49, drm_i915_mem_free_t)
+#define TARGET_DRM_IOCTL_I915_INIT_HEAP TARGET_IOW('d',
0x4a, drm_i915_mem_init_heap_t)
+#define TARGET_DRM_IOCTL_I915_CMDBUFFER TARGET_IOW('d',
0x4b, drm_i915_cmdbuffer_t)
+#define TARGET_DRM_IOCTL_I915_DESTROY_HEAP TARGET_IOW('d',
0x4c, drm_i915_mem_destroy_heap_t)
+#define TARGET_DRM_IOCTL_I915_SET_VBLANK_PIPE TARGET_IOW('d',
0x4d, drm_i915_vblank_pipe_t)
+#define TARGET_DRM_IOCTL_I915_GET_VBLANK_PIPE TARGET_IOR('d',
0x4e, drm_i915_vblank_pipe_t)
+#define TARGET_DRM_IOCTL_I915_VBLANK_SWAP
TARGET_IOWR('d', 0x4f, drm_i915_vblank_swap_t)
+#define TARGET_DRM_IOCTL_I915_HWS_ADDR TARGET_IOW('d',
0x51, struct drm_i915_gem_init)
+#define TARGET_DRM_IOCTL_I915_GEM_INIT TARGET_IOW('d',
0x53, struct drm_i915_gem_init)
+#define TARGET_DRM_IOCTL_I915_GEM_EXECBUFFER TARGET_IOW('d',
0x54, struct drm_i915_gem_execbuffer)
+#define TARGET_DRM_IOCTL_I915_GEM_PIN
TARGET_IOWR('d', 0x55, struct drm_i915_gem_pin)
+#define TARGET_DRM_IOCTL_I915_GEM_UNPIN TARGET_IOW('d',
0x56, struct drm_i915_gem_unpin)
+#define TARGET_DRM_IOCTL_I915_GEM_BUSY
TARGET_IOWR('d', 0x57, struct drm_i915_gem_busy)
+#define TARGET_DRM_IOCTL_I915_GEM_THROTTLE TARGET_IO('d', 0x58)
+#define TARGET_DRM_IOCTL_I915_GEM_ENTERVT TARGET_IO('d', 0x59)
+#define TARGET_DRM_IOCTL_I915_GEM_LEAVEVT TARGET_IO('d', 0x5a)
+#define TARGET_DRM_IOCTL_I915_GEM_CREATE
TARGET_IOWR('d', 0x5b, struct drm_i915_gem_create)
+#define TARGET_DRM_IOCTL_I915_GEM_PREAD TARGET_IOW('d',
0x5c, struct drm_i915_gem_pread)
+#define TARGET_DRM_IOCTL_I915_GEM_PWRITE TARGET_IOW('d',
0x5d, struct drm_i915_gem_pwrite)
+#define TARGET_DRM_IOCTL_I915_GEM_MMAP
TARGET_IOWR('d', 0x5e, struct drm_i915_gem_mmap)
+#define TARGET_DRM_IOCTL_I915_GEM_SET_DOMAIN TARGET_IOW('d',
0x5f, struct drm_i915_gem_set_domain)
+#define TARGET_DRM_IOCTL_I915_GEM_SW_FINISH TARGET_IOW('d',
0x60, struct drm_i915_gem_sw_finish)
+#define TARGET_DRM_IOCTL_I915_GEM_SET_TILING
TARGET_IOWR('d', 0x61, struct drm_i915_gem_set_tiling)
+#define TARGET_DRM_IOCTL_I915_GEM_GET_TILING
TARGET_IOWR('d', 0x62, struct drm_i915_gem_get_tiling)
+#define TARGET_DRM_IOCTL_I915_GEM_GET_APERTURE TARGET_IOR('d',
0x63, struct drm_i915_gem_get_aperture)
+#define TARGET_DRM_IOCTL_I915_GEM_MMAP_GTT
TARGET_IOWR('d', 0x64, struct drm_i915_gem_mmap_gtt)
+#define TARGET_DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID
TARGET_IOWR('d', 0x65, struct drm_i915_get_pipe_from_crtc_id)
+#define TARGET_DRM_IOCTL_I915_GEM_MADVISE
TARGET_IOWR('d', 0x66, struct drm_i915_gem_madvise)
+#define TARGET_DRM_IOCTL_I915_OVERLAY_PUT_IMAGE TARGET_IOW('d',
0x67, struct drm_intel_overlay_put_image)
+#define TARGET_DRM_IOCTL_I915_OVERLAY_ATTRS
TARGET_IOWR('d', 0x68, struct drm_intel_overlay_attrs)
+#define TARGET_DRM_IOCTL_I915_GEM_EXECBUFFER2 TARGET_IOW('d',
0x69, struct drm_i915_gem_execbuffer2)
+#define TARGET_DRM_IOCTL_I915_SET_SPRITE_COLORKEY
TARGET_IOWR('d', 0x6a, struct drm_intel_sprite_colorkey)
+#define TARGET_DRM_IOCTL_I915_GET_SPRITE_COLORKEY
TARGET_IOWR('d', 0x6b, struct drm_intel_sprite_colorkey)
+#define TARGET_DRM_IOCTL_I915_GEM_WAIT
TARGET_IOWR('d', 0x6c, struct drm_i915_gem_wait)
+#define TARGET_DRM_IOCTL_I915_GEM_CONTEXT_CREATE
TARGET_IOWR('d', 0x6d, struct drm_i915_gem_context_create)
+#define TARGET_DRM_IOCTL_I915_GEM_CONTEXT_DESTROY TARGET_IOW('d',
0x6e, struct drm_i915_gem_context_destroy)
+#define TARGET_DRM_IOCTL_I915_GEM_SET_CACHING TARGET_IOW('d',
0x6f, struct drm_i915_gem_caching)
+#define TARGET_DRM_IOCTL_I915_GEM_GET_CACHING TARGET_IOW('d',
0x70, struct drm_i915_gem_caching)
+#define TARGET_DRM_IOCTL_I915_REG_READ
TARGET_IOWR('d', 0x71, struct drm_i915_reg_read)
+#define TARGET_DRM_IOCTL_I915_GET_RESET_STATS
TARGET_IOWR('d', 0x72, struct drm_i915_reset_stats)
+#define TARGET_DRM_IOCTL_I915_GEM_USERPTR
TARGET_IOWR('d', 0x73, struct drm_i915_gem_userptr)
+
/* soundcard defines */
/* XXX: convert them all to arch indepedent entries */
#define TARGET_SNDCTL_COPR_HALT TARGET_IOWR('C', 7, int);
@@ -253,3 +253,654 @@ STRUCT(blkpg_ioctl_arg,
TYPE_INT, /* flags */
TYPE_INT, /* datalen */
MK_PTR(MK_STRUCT(STRUCT_blkpg_partition))) /* data */
+
+STRUCT(drm_version,
+ TYPE_INT, /* version_major */
+ TYPE_INT, /* version_minor */
+ TYPE_INT, /* version_patchlevel */
+ TYPE_LONG, /* name_len (size_t) */
+ TYPE_PTRVOID, /* name (char *) */
+ TYPE_LONG, /* date_len (size_t) */
+ TYPE_PTRVOID, /* date (char *) */
+ TYPE_LONG, /* desc_len (size_t) */
+ TYPE_PTRVOID) /* desc (char *) */
+
+STRUCT(drm_unique,
+ TYPE_LONG, /* unique_len (size_t) */
+ TYPE_PTRVOID) /* unique (char *) */
+
+STRUCT(drm_auth,
+ TYPE_INT) /* magic (u32) */
+
+STRUCT(drm_block,
+ TYPE_INT) /* unused */
+
+STRUCT(drm_control,
+ TYPE_INT, /* func (enum) */
+ TYPE_INT) /* irq */
+
+STRUCT(drm_irq_busid,
+ TYPE_INT, /* irq */
+ TYPE_INT, /* busnum */
+ TYPE_INT, /* devnum */
+ TYPE_INT) /* funcnum */
+
+STRUCT(drm_map,
+ TYPE_ULONG, /* offset */
+ TYPE_ULONG, /* size */
+ TYPE_INT, /* type (enum drm_map_type) */
+ TYPE_INT, /* flags (enum drm_map_flags) */
+ TYPE_PTRVOID, /* handle */
+ TYPE_INT) /* mtrr */
+
+STRUCT(drm_buf_desc,
+ TYPE_INT, /* count */
+ TYPE_INT, /* size */
+ TYPE_INT, /* low_mark */
+ TYPE_INT, /* high_mark */
+ TYPE_INT, /* flags (enum) */
+ TYPE_ULONG) /* agp_start */
+
+STRUCT(drm_buf_info,
+ TYPE_INT, /* count */
+ TYPE_PTRVOID) /* list (struct drm_buf_desc *) */
+
+STRUCT(drm_buf_pub,
+ TYPE_INT, /* idx */
+ TYPE_INT, /* total */
+ TYPE_INT, /* used */
+ TYPE_PTRVOID) /* address (void *) */
+
+STRUCT(drm_buf_map,
+ TYPE_INT, /* count */
+ TYPE_PTRVOID, /* virtual */
+ TYPE_PTRVOID) /* list (struct drm_buf_pub *) */
+
+STRUCT(drm_buf_free,
+ TYPE_INT, /* count */
+ TYPE_PTRVOID) /* list (int *) */
+
+STRUCT(drm_ctx_priv_map,
+ TYPE_INT, /* ctx_id (u32) */
+ TYPE_PTRVOID) /* handle */
+
+STRUCT(drm_client,
+ TYPE_INT, /* idx */
+ TYPE_INT, /* auth */
+ TYPE_ULONG, /* pid */
+ TYPE_ULONG, /* uid */
+ TYPE_ULONG, /* magic */
+ TYPE_ULONG) /* iocs */
+
+STRUCT(drm_stats_internal,
+ TYPE_ULONG, /* value */
+ TYPE_INT) /* type (enum drm_stat_type) */
+
+STRUCT(drm_stats,
+ TYPE_ULONG, /* count */
+ MK_ARRAY(MK_STRUCT(STRUCT_drm_stats_internal), 15)) /* data */
+
+STRUCT(drm_set_version,
+ TYPE_INT, /* drm_di_major */
+ TYPE_INT, /* drm_di_minor */
+ TYPE_INT, /* drm_dd_major */
+ TYPE_INT) /* drm_dd_minor */
+
+STRUCT(drm_modeset_ctl,
+ TYPE_INT, /* crtc (u32) */
+ TYPE_INT) /* cmd (u32) */
+
+STRUCT(drm_gem_close,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_gem_flink,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* name (u32) */
+
+STRUCT(drm_gem_open,
+ TYPE_INT, /* name (u32) */
+ TYPE_INT, /* handle (u32) */
+ TYPE_ULONGLONG) /* size (u64) */
+
+STRUCT(drm_get_cap,
+ TYPE_ULONGLONG, /* capability (u64) */
+ TYPE_ULONGLONG) /* value (u64) */
+
+STRUCT(drm_set_client_cap,
+ TYPE_ULONGLONG, /* capability (u64) */
+ TYPE_ULONGLONG) /* value (u64) */
+
+STRUCT(drm_ctx,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* flags (enum drm_ctx_flags) */
+
+STRUCT(drm_ctx_res,
+ TYPE_INT, /* count */
+ TYPE_PTRVOID) /* contexts (struct drm_ctx *) */
+
+STRUCT(drm_draw,
+ TYPE_INT) /* handle (u32) */
+
+STRUCT(drm_dma,
+ TYPE_INT, /* context */
+ TYPE_INT, /* send_count */
+ TYPE_PTRVOID, /* send_indices */
+ TYPE_PTRVOID, /* send_sizes */
+ TYPE_INT, /* flags (enum drm_dma_flags) */
+ TYPE_INT, /* request_count */
+ TYPE_INT, /* request_size */
+ TYPE_PTRVOID, /* request_indices */
+ TYPE_PTRVOID, /* request_sizes */
+ TYPE_INT) /* granted_count */
+
+STRUCT(drm_lock,
+ TYPE_INT, /* context */
+ TYPE_INT) /* flags (enum drm_lock_flags) */
+
+STRUCT(drm_prime_handle,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT) /* fd (s32) */
+
+STRUCT(drm_agp_mode,
+ TYPE_ULONG) /* mode */
+
+STRUCT(drm_agp_info,
+ TYPE_INT, /* agp_version_major */
+ TYPE_INT, /* agp_version_minor */
+ TYPE_ULONG, /* mode */
+ TYPE_ULONG, /* aperture_base */
+ TYPE_ULONG, /* aperture_size */
+ TYPE_ULONG, /* memory_allowed */
+ TYPE_ULONG, /* memory_used */
+ TYPE_SHORT, /* id_vendor (u16) */
+ TYPE_SHORT) /* id_device (u16) */
+
+STRUCT(drm_agp_buffer,
+ TYPE_ULONG, /* size */
+ TYPE_ULONG, /* handle */
+ TYPE_ULONG, /* type */
+ TYPE_ULONG) /* physical */
+
+STRUCT(drm_agp_binding,
+ TYPE_ULONG, /* handle */
+ TYPE_ULONG) /* offset */
+
+STRUCT(drm_scatter_gather,
+ TYPE_ULONG, /* size */
+ TYPE_ULONG) /* handle */
+
+STRUCT(drm_wait_vblank_reply,
+ TYPE_INT, /* type (enum drm_vblank_seq_type) */
+ TYPE_INT, /* sequence (u32) */
+ TYPE_ULONG, /* tval_sec */
+ TYPE_ULONG) /* tval_usec */
+
+STRUCT(drm_update_draw,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* type (u32) */
+ TYPE_INT, /* num (u32) */
+ TYPE_ULONGLONG) /* data (u64) */
+
+STRUCT(drm_mode_card_res,
+ TYPE_ULONGLONG, /* fb_id_ptr (u64) */
+ TYPE_ULONGLONG, /* crtc_id_ptr (u64) */
+ TYPE_ULONGLONG, /* connector_id_ptr (u64) */
+ TYPE_ULONGLONG, /* encoder_id_ptr (u64) */
+ TYPE_INT, /* count_fbs (u32) */
+ TYPE_INT, /* count_crtcs (u32) */
+ TYPE_INT, /* count_connectors (u32) */
+ TYPE_INT, /* count_encoders (u32) */
+ TYPE_INT, /* min_width (u32) */
+ TYPE_INT, /* max_width (u32) */
+ TYPE_INT, /* min_height (u32) */
+ TYPE_INT) /* max_height (u32) */
+
+STRUCT(drm_mode_modeinfo,
+ TYPE_INT, /* clock (u32) */
+ TYPE_SHORT, /* hdisplay (u16) */
+ TYPE_SHORT, /* hsync_start (u16) */
+ TYPE_SHORT, /* hsync_end (u16) */
+ TYPE_SHORT, /* htotal (u16) */
+ TYPE_SHORT, /* hskew (u16) */
+ TYPE_SHORT, /* vdisplay (u16) */
+ TYPE_SHORT, /* vsync_start (u16) */
+ TYPE_SHORT, /* vsync_end (u16) */
+ TYPE_SHORT, /* vtotal (u16) */
+ TYPE_SHORT, /* vscan (u16) */
+ TYPE_INT, /* vrefresh (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* type (u32) */
+ MK_ARRAY(TYPE_CHAR, DRM_DISPLAY_MODE_LEN)) /* name */
+
+STRUCT(drm_mode_crtc,
+ TYPE_ULONGLONG, /* set_connectors_ptr (u64) */
+ TYPE_INT, /* count_connectors (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* x (u32) */
+ TYPE_INT, /* y (u32) */
+ TYPE_INT, /* gamma_size (u32) */
+ TYPE_INT, /* mode_valid (u32) */
+ MK_STRUCT(STRUCT_drm_mode_modeinfo)) /* mode */
+
+STRUCT(drm_mode_cursor,
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* x (s32) */
+ TYPE_INT, /* y (s32) */
+ TYPE_INT, /* width (u32) */
+ TYPE_INT, /* height (u32) */
+ TYPE_INT) /* handle (u32) */
+
+STRUCT(drm_mode_crtc_lut,
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* gamma_size (u32) */
+ TYPE_ULONGLONG, /* red (u64) */
+ TYPE_ULONGLONG, /* green (u64) */
+ TYPE_ULONGLONG) /* blue (u64) */
+
+STRUCT(drm_mode_get_encoder,
+ TYPE_INT, /* encoder_id (u32) */
+ TYPE_INT, /* encoder_type (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* possible_crtcs (u32) */
+ TYPE_INT) /* possible_clones (u32) */
+
+STRUCT(drm_mode_get_connector,
+ TYPE_ULONGLONG, /* encoders_ptr (u64) */
+ TYPE_ULONGLONG, /* modes_ptr (u64) */
+ TYPE_ULONGLONG, /* props_ptr (u64) */
+ TYPE_ULONGLONG, /* prop_values_ptr (u64) */
+ TYPE_INT, /* count_modes (u32) */
+ TYPE_INT, /* count_props (u32) */
+ TYPE_INT, /* count_encoders (u32) */
+ TYPE_INT, /* encoder_id (u32) */
+ TYPE_INT, /* connector_id (u32) */
+ TYPE_INT, /* connector_type (u32) */
+ TYPE_INT, /* connector_type_id (u32) */
+ TYPE_INT, /* connection (u32) */
+ TYPE_INT, /* mm_width (u32) */
+ TYPE_INT, /* mm_height (u32) */
+ TYPE_INT, /* subpixel (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_mode_mode_cmd,
+ TYPE_INT, /* connector_id (u32) */
+ MK_STRUCT(STRUCT_drm_mode_modeinfo)) /* mode */
+
+STRUCT(drm_mode_get_property,
+ TYPE_ULONGLONG, /* values_ptr (u64) */
+ TYPE_ULONGLONG, /* enum_blob_ptr (u64) */
+ TYPE_INT, /* prop_id (u32) */
+ TYPE_INT, /* flags (u32) */
+ MK_ARRAY(TYPE_CHAR, DRM_PROP_NAME_LEN), /* name (u32) */
+ TYPE_INT, /* count_values (u32) */
+ TYPE_INT) /* count_enum_blobs (u32) */
+
+STRUCT(drm_mode_connector_set_property,
+ TYPE_ULONGLONG, /* value (u64) */
+ TYPE_INT, /* prop_id (u32) */
+ TYPE_INT) /* connector_id (u32) */
+
+STRUCT(drm_mode_get_blob,
+ TYPE_INT, /* blob_id (u32) */
+ TYPE_INT, /* length (u32) */
+ TYPE_ULONGLONG) /* data (u64) */
+
+STRUCT(drm_mode_fb_cmd,
+ TYPE_INT, /* width (u32) */
+ TYPE_INT, /* height (u32) */
+ TYPE_INT, /* pitch (u32) */
+ TYPE_INT, /* bpp (u32) */
+ TYPE_INT, /* depth (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT) /* handle (u32) */
+
+STRUCT(drm_mode_crtc_page_flip,
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* gamma_size (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* reserved (u32) */
+ TYPE_ULONGLONG) /* user_data (u64) */
+
+STRUCT(drm_mode_fb_dirty_cmd,
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* color (u32) */
+ TYPE_INT, /* num_clips (u32) */
+ TYPE_ULONGLONG) /* clips_ptr (u64) */
+
+STRUCT(drm_mode_create_dumb,
+ TYPE_INT, /* height (u32) */
+ TYPE_INT, /* width (u32) */
+ TYPE_INT, /* bpp (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pitch (u32) */
+ TYPE_ULONGLONG) /* size (u64) */
+
+STRUCT(drm_mode_map_dumb,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG) /* offset (u64) */
+
+STRUCT(drm_mode_destroy_dumb,
+ TYPE_INT) /* handle (u32) */
+
+STRUCT(drm_mode_get_plane_res,
+ TYPE_ULONGLONG, /* plane_id_ptr (u64) */
+ TYPE_INT) /* count_planes (u32) */
+
+STRUCT(drm_mode_get_plane,
+ TYPE_INT, /* plane_id (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* possible_crtcs (u32) */
+ TYPE_INT, /* gamma_size (u32) */
+ TYPE_INT, /* count_format_types (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_ULONGLONG) /* format_type_ptr (u64) */
+
+STRUCT(drm_mode_set_plane,
+ TYPE_INT, /* plane_id (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* crtc_x (s32) */
+ TYPE_INT, /* crtc_y (s32) */
+ TYPE_INT, /* crtc_w (u32) */
+ TYPE_INT, /* crtc_h (u32) */
+ TYPE_INT, /* src_x (u32) */
+ TYPE_INT, /* src_y (u32) */
+ TYPE_INT, /* src_h (u32) */
+ TYPE_INT) /* src_w (u32) */
+
+STRUCT(drm_mode_fb_cmd2,
+ TYPE_INT, /* fb_id (u32) */
+ TYPE_INT, /* width (u32) */
+ TYPE_INT, /* height (u32) */
+ TYPE_INT, /* pixel_format (u32) */
+ TYPE_INT, /* flags (u32) */
+ MK_ARRAY(TYPE_INT, 4), /* handles (u32) */
+ MK_ARRAY(TYPE_INT, 4), /* pitches (u32) */
+ MK_ARRAY(TYPE_INT, 4)) /* offsets (u32) */
+
+STRUCT(drm_mode_obj_get_properties,
+ TYPE_ULONGLONG, /* props_ptr (u64) */
+ TYPE_ULONGLONG, /* prop_values_ptr (u64) */
+ TYPE_INT, /* count_props (u32) */
+ TYPE_INT, /* obj_id (u32) */
+ TYPE_INT) /* obj_type (u32) */
+
+STRUCT(drm_mode_obj_set_property,
+ TYPE_ULONGLONG, /* value (u64) */
+ TYPE_INT, /* prop_id (u32) */
+ TYPE_INT, /* obj_id (u32) */
+ TYPE_INT) /* obj_type (u32) */
+
+STRUCT(drm_mode_cursor2,
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT, /* x (s32) */
+ TYPE_INT, /* y (s32) */
+ TYPE_INT, /* width (u32) */
+ TYPE_INT, /* height (u32) */
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* hot_x (s32) */
+ TYPE_INT) /* hot_y (s32) */
+
+STRUCT(drm_i915_init_t,
+ TYPE_INT, /* func (enum) */
+ TYPE_INT, /* mmio_offset (u32) */
+ TYPE_INT, /* sarea_priv_offset */
+ TYPE_INT, /* ring_start (u32) */
+ TYPE_INT, /* ring_end (u32) */
+ TYPE_INT, /* ring_size (u32) */
+ TYPE_INT, /* front_offset (u32) */
+ TYPE_INT, /* back_offset (u32) */
+ TYPE_INT, /* depth_offset (u32) */
+ TYPE_INT, /* w (u32) */
+ TYPE_INT, /* h (u32) */
+ TYPE_INT, /* pitch (u32) */
+ TYPE_INT, /* pitch_bits (u32) */
+ TYPE_INT, /* back_pitch (u32) */
+ TYPE_INT, /* depth_pitch (u32) */
+ TYPE_INT, /* cpp (u32) */
+ TYPE_INT) /* chipset (u32) */
+
+STRUCT(drm_i915_batchbuffer_t,
+ TYPE_INT, /* start */
+ TYPE_INT, /* used */
+ TYPE_INT, /* DR1 */
+ TYPE_INT, /* DR4 */
+ TYPE_INT, /* num_cliprects */
+ TYPE_PTRVOID) /* cliprects (struct drm_clip_rect *) */
+
+STRUCT(drm_i915_irq_emit_t,
+ TYPE_PTRVOID) /* irq_seq (int *) */
+
+STRUCT(drm_i915_irq_wait_t,
+ TYPE_INT) /* irq_seq */
+
+STRUCT(drm_i915_getparam_t,
+ TYPE_INT, /* param */
+ TYPE_PTRVOID) /* value */
+
+STRUCT(drm_i915_setparam_t,
+ TYPE_INT, /* param */
+ TYPE_INT) /* value */
+
+STRUCT(drm_i915_mem_alloc_t,
+ TYPE_INT, /* region */
+ TYPE_INT, /* alignment */
+ TYPE_INT, /* size */
+ TYPE_PTRVOID) /* region_offset */
+
+STRUCT(drm_i915_mem_free_t,
+ TYPE_INT, /* region */
+ TYPE_INT) /* region_offset */
+
+STRUCT(drm_i915_mem_init_heap_t,
+ TYPE_INT, /* region */
+ TYPE_INT, /* size */
+ TYPE_INT) /* start */
+
+STRUCT(drm_i915_cmdbuffer_t,
+ TYPE_PTRVOID, /* buf (char *) */
+ TYPE_INT, /* sz */
+ TYPE_INT, /* DR1 */
+ TYPE_INT, /* DR4 */
+ TYPE_INT, /* num_cliprects */
+ TYPE_PTRVOID) /* cliprects (struct drm_clip_rect *) */
+
+STRUCT(drm_i915_mem_destroy_heap_t,
+ TYPE_INT) /* region */
+
+STRUCT(drm_i915_vblank_pipe_t,
+ TYPE_INT) /* pipe */
+
+STRUCT(drm_i915_vblank_swap_t,
+ TYPE_INT, /* drawable (u32) */
+ TYPE_INT, /* seqtype (enum drm_vblank_seq_type) */
+ TYPE_INT) /* sequence (u32) */
+
+STRUCT(drm_i915_gem_init,
+ TYPE_ULONGLONG, /* gtt_start (u64) */
+ TYPE_ULONGLONG) /* gtt_end (u64) */
+
+STRUCT(drm_i915_gem_execbuffer,
+ TYPE_ULONGLONG, /* buffers_ptr (u64) */
+ TYPE_INT, /* buffer_count (u32) */
+ TYPE_INT, /* batch_start_offset (u32) */
+ TYPE_INT, /* batch_len (u32) */
+ TYPE_INT, /* DR1 (u32) */
+ TYPE_INT, /* DR4 (u32) */
+ TYPE_INT, /* num_cliprects (u32) */
+ TYPE_ULONGLONG) /* cliprects_ptr (u64) */
+
+STRUCT(drm_i915_gem_pin,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG, /* alignment */
+ TYPE_ULONGLONG) /* offset */
+
+STRUCT(drm_i915_gem_unpin,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_i915_gem_busy,
+ TYPE_INT, /* handle(u32) */
+ TYPE_INT) /* busy(u32) */
+
+STRUCT(drm_i915_gem_create,
+ TYPE_ULONGLONG, /* size (u64) */
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_i915_gem_pread,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG, /* offset (u64) */
+ TYPE_ULONGLONG, /* size (u64) */
+ TYPE_ULONGLONG) /* data_ptr (u64) */
+
+STRUCT(drm_i915_gem_pwrite,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG, /* offset (u64) */
+ TYPE_ULONGLONG, /* size (u64) */
+ TYPE_ULONGLONG) /* data_ptr (u64) */
+
+STRUCT(drm_i915_gem_mmap,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG, /* offset (u64) */
+ TYPE_ULONGLONG, /* size (u64) */
+ TYPE_ULONGLONG) /* addr_ptr (u64) */
+
+STRUCT(drm_i915_gem_mmap_gtt,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* pad (u32) */
+ TYPE_ULONGLONG) /* offset (u64) */
+
+STRUCT(drm_i915_gem_set_domain,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* read_domains (u32) */
+ TYPE_INT) /* write_domain (u32) */
+
+STRUCT(drm_i915_gem_sw_finish,
+ TYPE_INT) /* handle (u32) */
+
+STRUCT(drm_i915_gem_set_tiling,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* tiling_mode (u32) */
+ TYPE_INT, /* stride (u32) */
+ TYPE_INT) /* swizzle_mode (u32) */
+
+STRUCT(drm_i915_gem_get_tiling,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* tiling_mode (u32) */
+ TYPE_INT) /* swizzle_mode (u32) */
+
+STRUCT(drm_i915_gem_get_aperture,
+ TYPE_ULONGLONG, /* aper_size (u64) */
+ TYPE_ULONGLONG) /* aper_available_size (u64) */
+
+STRUCT(drm_i915_get_pipe_from_crtc_id,
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_INT) /* pipe (u32) */
+
+STRUCT(drm_i915_gem_madvise,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT, /* madv (u32) */
+ TYPE_INT) /* retained (u32) */
+
+STRUCT(drm_intel_overlay_put_image,
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* bo_handle (u32) */
+ TYPE_SHORT, /* stride_Y (u16) */
+ TYPE_SHORT, /* stride_UV (u16) */
+ TYPE_INT, /* offset_Y (u32) */
+ TYPE_INT, /* offset_U (u32) */
+ TYPE_INT, /* offset_V (u32) */
+ TYPE_SHORT, /* src_width (u16) */
+ TYPE_SHORT, /* src_height (u16) */
+ TYPE_SHORT, /* src_scan_width */
+ TYPE_SHORT, /* src_scan_height */
+ TYPE_INT, /* crtc_id (u32) */
+ TYPE_SHORT, /* dst_x (u16) */
+ TYPE_SHORT, /* dst_y (u16) */
+ TYPE_SHORT, /* dst_width (u16) */
+ TYPE_SHORT) /* dst_height (u16) */
+
+STRUCT(drm_intel_overlay_attrs,
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* color_key (u32) */
+ TYPE_INT, /* brightness (s32) */
+ TYPE_INT, /* contrast (u32) */
+ TYPE_INT, /* saturation (u32) */
+ TYPE_INT, /* gamma0 (u32) */
+ TYPE_INT, /* gamma1 (u32) */
+ TYPE_INT, /* gamma2 (u32) */
+ TYPE_INT, /* gamma3 (u32) */
+ TYPE_INT, /* gamma4 (u32) */
+ TYPE_INT) /* gamma5 (u32) */
+
+STRUCT(drm_i915_gem_execbuffer2,
+ TYPE_ULONGLONG, /* buffers_ptr (u64) */
+ TYPE_INT, /* buffer_count (u32) */
+ TYPE_INT, /* batch_start_offset (u32) */
+ TYPE_INT, /* batch_len (u32) */
+ TYPE_INT, /* DR1 (u32) */
+ TYPE_INT, /* DR4 (u32) */
+ TYPE_INT, /* num_cliprects (u32) */
+ TYPE_ULONGLONG, /* cliprects_ptr (u64) */
+ TYPE_ULONGLONG, /* flags (u64) */
+ TYPE_ULONGLONG, /* rsvd1 (u64) */
+ TYPE_ULONGLONG) /* rsvd2 (u64) */
+
+STRUCT(drm_intel_sprite_colorkey,
+ TYPE_INT, /* plane_id (u32) */
+ TYPE_INT, /* min_value (u32) */
+ TYPE_INT, /* channel_mask (u32) */
+ TYPE_INT, /* max_value (u32) */
+ TYPE_INT) /* flags (u32) */
+
+STRUCT(drm_i915_gem_wait,
+ TYPE_INT, /* bo_handle (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_LONGLONG) /* timeout_ns (s64) */
+
+STRUCT(drm_i915_gem_context_create,
+ TYPE_INT, /* ctx_id (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_i915_gem_context_destroy,
+ TYPE_INT, /* ctx_id (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_i915_gem_caching,
+ TYPE_INT, /* handle (u32) */
+ TYPE_INT) /* caching (u32) */
+
+STRUCT(drm_i915_reg_read,
+ TYPE_ULONGLONG, /* offset (u64) */
+ TYPE_ULONGLONG) /* val (u64) */
+
+STRUCT(drm_i915_reset_stats,
+ TYPE_INT, /* ctx_id (u32) */
+ TYPE_INT, /* flags (u32) */
+ TYPE_INT, /* reset_count (u32) */
+ TYPE_INT, /* batch_active (u32) */
+ TYPE_INT, /* batch_pending (u32) */
+ TYPE_INT) /* pad (u32) */
+
+STRUCT(drm_i915_gem_userptr,
+ TYPE_ULONGLONG, /* user_ptr (u64) */
+ TYPE_ULONGLONG, /* user_size (u64) */
+ TYPE_ULONG, /* flags (u32) */
+ TYPE_ULONG) /* handle (u32) */
@@ -25,7 +25,7 @@
//#define DEBUG
-#define MAX_STRUCTS 128
+#define MAX_STRUCTS 256
/* XXX: make it dynamic */
StructEntry struct_entries[MAX_STRUCTS];