@@ -2404,14 +2404,14 @@
bytes further than previously thought. The length-based
test for bra vs. jump is very conservative though, so the
branch will still be within range. */
- rtvec vec;
+ rtx_sequence *seq;
int seen;
- vec = XVEC (final_sequence, 0);
+ seq = final_sequence;
final_sequence = 0;
- final_scan_insn (RTVEC_ELT (vec, 1), asm_out_file, optimize, 1, & seen);
- final_scan_insn (RTVEC_ELT (vec, 0), asm_out_file, optimize, 1, & seen);
- INSN_DELETED_P (RTVEC_ELT (vec, 1)) = 1;
+ final_scan_insn (seq->insn (1), asm_out_file, optimize, 1, & seen);
+ final_scan_insn (seq->insn (0), asm_out_file, optimize, 1, & seen);
+ INSN_DELETED_P (seq->insn (1)) = 1;
return "";
}
}
@@ -12496,9 +12496,9 @@ mips_output_conditional_branch (rtx_insn *insn, rtx *operands,
delay slot if is not annulled. */
if (!INSN_ANNULLED_BRANCH_P (insn))
{
- final_scan_insn (XVECEXP (final_sequence, 0, 1),
+ final_scan_insn (final_sequence->insn (1),
asm_out_file, optimize, 1, NULL);
- INSN_DELETED_P (XVECEXP (final_sequence, 0, 1)) = 1;
+ INSN_DELETED_P (final_sequence->insn (1)) = 1;
}
else
output_asm_insn ("nop", 0);
@@ -12521,9 +12521,9 @@ mips_output_conditional_branch (rtx_insn *insn, rtx *operands,
Use INSN's delay slot if is annulled. */
if (INSN_ANNULLED_BRANCH_P (insn))
{
- final_scan_insn (XVECEXP (final_sequence, 0, 1),
+ final_scan_insn (final_sequence->insn (1),
asm_out_file, optimize, 1, NULL);
- INSN_DELETED_P (XVECEXP (final_sequence, 0, 1)) = 1;
+ INSN_DELETED_P (final_sequence->insn (1)) = 1;
}
else
output_asm_insn ("nop", 0);
@@ -184,7 +184,7 @@ static bool shmedia_space_reserved_for_target_registers;
static void split_branches (rtx_insn *);
static int branch_dest (rtx);
-static void print_slot (rtx);
+static void print_slot (rtx_sequence *);
static rtx_code_label *add_constant (rtx, enum machine_mode, rtx);
static void dump_table (rtx_insn *, rtx_insn *);
static bool broken_move (rtx_insn *);
@@ -2641,11 +2641,11 @@ output_movedouble (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
another instruction, but couldn't because the other instruction expanded
into a sequence where putting the slot insn at the end wouldn't work. */
static void
-print_slot (rtx insn)
+print_slot (rtx_sequence *seq)
{
- final_scan_insn (XVECEXP (insn, 0, 1), asm_out_file, optimize, 1, NULL);
+ final_scan_insn (seq->insn (1), asm_out_file, optimize, 1, NULL);
- INSN_DELETED_P (XVECEXP (insn, 0, 1)) = 1;
+ INSN_DELETED_P (seq->insn (1)) = 1;
}
const char *
@@ -2171,7 +2171,7 @@ call_from_call_insn (rtx_call_insn *insn)
both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
rtx_insn *
-final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
+final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
int nopeepholes ATTRIBUTE_UNUSED, int *seen)
{
#ifdef HAVE_cc0
@@ -2179,8 +2179,6 @@ final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
#endif
rtx_insn *next;
- rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
-
insn_counter++;
/* Ignore deleted insns. These can occur when we split insns (due to a
@@ -72,7 +72,7 @@ extern void final (rtx_insn *, FILE *, int);
/* The final scan for one insn, INSN. Args are same as in `final', except
that INSN is the insn being scanned. Value returned is the next insn to
be scanned. */
-extern rtx_insn *final_scan_insn (rtx, FILE *, int, int, int *);
+extern rtx_insn *final_scan_insn (rtx_insn *, FILE *, int, int, int *);
/* Replace a SUBREG with a REG or a MEM, based on the thing it is a
subreg of. */