@@ -28,21 +28,9 @@
#define TEGRA_ARM_PERIF_BASE 0x50040000
#define TEGRA_ARM_PERIF_SIZE SZ_8K
-#define TEGRA_TMR1_BASE 0x60005000
-#define TEGRA_TMR1_SIZE SZ_8
-
-#define TEGRA_TMR2_BASE 0x60005008
-#define TEGRA_TMR2_SIZE SZ_8
-
#define TEGRA_TMRUS_BASE 0x60005010
#define TEGRA_TMRUS_SIZE SZ_64
-#define TEGRA_TMR3_BASE 0x60005050
-#define TEGRA_TMR3_SIZE SZ_8
-
-#define TEGRA_TMR4_BASE 0x60005058
-#define TEGRA_TMR4_SIZE SZ_8
-
#define TEGRA_CLK_RESET_BASE 0x60006000
#define TEGRA_CLK_RESET_SIZE SZ_4K
@@ -58,21 +46,6 @@
#define TEGRA_APB_MISC_BASE 0x70000000
#define TEGRA_APB_MISC_SIZE SZ_4K
-#define TEGRA_UARTA_BASE 0x70006000
-#define TEGRA_UARTA_SIZE SZ_64
-
-#define TEGRA_UARTB_BASE 0x70006040
-#define TEGRA_UARTB_SIZE SZ_64
-
-#define TEGRA_UARTC_BASE 0x70006200
-#define TEGRA_UARTC_SIZE SZ_256
-
-#define TEGRA_UARTD_BASE 0x70006300
-#define TEGRA_UARTD_SIZE SZ_256
-
-#define TEGRA_UARTE_BASE 0x70006400
-#define TEGRA_UARTE_SIZE SZ_256
-
#define TEGRA_PMC_BASE 0x7000E400
#define TEGRA_PMC_SIZE SZ_256
@@ -91,9 +64,6 @@
#define TEGRA124_EMC_BASE 0x7001B000
#define TEGRA124_EMC_SIZE SZ_2K
-#define TEGRA_CSITE_BASE 0x70040000
-#define TEGRA_CSITE_SIZE SZ_256K
-
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).