Message ID | 677105509.189583.1409161536993.JavaMail.zimbra@xes-inc.com |
---|---|
State | Accepted |
Commit | 438320dd34a4d0b2b177fbae749c3b9d00532faf |
Headers | show |
On Wed, Aug 27, 2014 at 12:45:36PM -0500, Aaron Sierra wrote: > From: Jordan Friendshuh <jfriendshuh@xes-inc.com> > > NAND devices with page sizes over 4 KiB require more than 4-bits of ECC > coverage. This patch calculates the value of ecc_bytes based on a still > assumed 512-byte step size (13-bits) and the ecc_strength. > > Example: > Micron M73A devices (8 KiB page) require 8-bit ECC per 512-byte > > Signed-off-by: Jordan Friendshuh <jfriendshuh@xes-inc.com> > Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Applied to l2-mtd.git. Brian
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 4f3e80c..9fdfed4 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -4001,7 +4001,7 @@ int nand_scan_tail(struct mtd_info *mtd) */ if (!ecc->size && (mtd->oobsize >= 64)) { ecc->size = 512; - ecc->bytes = 7; + ecc->bytes = DIV_ROUND_UP(13 * ecc->strength, 8); } ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes, &ecc->layout);