From patchwork Thu Nov 12 05:58:47 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 38216 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 17ABAB6F1E for ; Thu, 12 Nov 2009 17:51:34 +1100 (EST) Received: from localhost ([127.0.0.1]:34923 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N8TWl-0002WP-4H for incoming@patchwork.ozlabs.org; Thu, 12 Nov 2009 01:51:31 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N8Snt-0000bY-2n for qemu-devel@nongnu.org; Thu, 12 Nov 2009 01:05:09 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N8Snl-0000UU-6T for qemu-devel@nongnu.org; Thu, 12 Nov 2009 01:05:05 -0500 Received: from [199.232.76.173] (port=53908 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N8Snj-0000TH-H9 for qemu-devel@nongnu.org; Thu, 12 Nov 2009 01:04:59 -0500 Received: from mail.valinux.co.jp ([210.128.90.3]:53585) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N8Sni-0001Dk-Pf for qemu-devel@nongnu.org; Thu, 12 Nov 2009 01:04:59 -0500 Received: from nm.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with ESMTP id 082FB4A415; Thu, 12 Nov 2009 15:04:56 +0900 (JST) Received: from yamahata by nm.local.valinux.co.jp with local (Exim 4.69) (envelope-from ) id 1N8Shl-0006cf-7k; Thu, 12 Nov 2009 14:58:49 +0900 From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com Date: Thu, 12 Nov 2009 14:58:47 +0900 Message-Id: <1258005528-25383-20-git-send-email-yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1258005528-25383-1-git-send-email-yamahata@valinux.co.jp> References: <1258005528-25383-1-git-send-email-yamahata@valinux.co.jp> X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp Subject: [Qemu-devel] [PATCH 19/20] pci: pci bridge related clean up. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org - fix bridge prefetchable memory accesser to check 64bit or not. - use pcibus_t consistently instead mixing pcibus_t and uint64_t. Signed-off-by: Isaku Yamahata Acked-by: Michael S. Tsirkin --- hw/pci.c | 18 +++++++++++------- hw/pci.h | 1 + 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index d1b884a..add919b 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -634,19 +634,23 @@ static uint32_t pci_config_get_io_base(PCIDevice *d, return val; } -static uint64_t pci_config_get_memory_base(PCIDevice *d, uint32_t base) +static pcibus_t pci_config_get_memory_base(PCIDevice *d, uint32_t base) { - return ((uint64_t)pci_get_word(d->config + base) & PCI_MEMORY_RANGE_MASK) + return ((pcibus_t)pci_get_word(d->config + base) & PCI_MEMORY_RANGE_MASK) << 16; } -static uint64_t pci_config_get_pref_base(PCIDevice *d, +static pcibus_t pci_config_get_pref_base(PCIDevice *d, uint32_t base, uint32_t upper) { - uint64_t val; - val = ((uint64_t)pci_get_word(d->config + base) & - PCI_PREF_RANGE_MASK) << 16; - val |= (uint64_t)pci_get_long(d->config + upper) << 32; + pcibus_t tmp; + pcibus_t val; + + tmp = (pcibus_t)pci_get_word(d->config + base); + val = (tmp & PCI_PREF_RANGE_MASK) << 16; + if (tmp & PCI_PREF_RANGE_TYPE_64) { + val |= (pcibus_t)pci_get_long(d->config + upper) << 32; + } return val; } diff --git a/hw/pci.h b/hw/pci.h index 72a476e..03639b7 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -131,6 +131,7 @@ typedef struct PCIIORegion { #define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ #define PCI_PREF_MEMORY_LIMIT 0x26 #define PCI_PREF_RANGE_MASK (~0x0fUL) +#define PCI_PREF_RANGE_TYPE_64 0x01 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ #define PCI_PREF_LIMIT_UPPER32 0x2c #define PCI_SUBSYSTEM_VENDOR_ID 0x2c /* 16 bits */