@@ -184,9 +184,8 @@
reg = <0x0 0x1f21c000 0x0 0x1000>;
reg-names = "csr-reg";
clock-output-names = "sataphy1clk";
- status = "disabled";
csr-offset = <0x4>;
- csr-mask = <0x00>;
+ csr-mask = <0x3a>;
enable-offset = <0x0>;
enable-mask = <0x06>;
};
@@ -198,7 +197,6 @@
reg = <0x0 0x1f22c000 0x0 0x1000>;
reg-names = "csr-reg";
clock-output-names = "sataphy2clk";
- status = "ok";
csr-offset = <0x4>;
csr-mask = <0x3a>;
enable-offset = <0x0>;
@@ -212,7 +210,6 @@
reg = <0x0 0x1f23c000 0x0 0x1000>;
reg-names = "csr-reg";
clock-output-names = "sataphy3clk";
- status = "ok";
csr-offset = <0x4>;
csr-mask = <0x3a>;
enable-offset = <0x0>;