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[2/3] Document: fsl, esai: Adjust the document making it read more comfortably.

Message ID 1408423138-19880-3-git-send-email-Li.Xiubo@freescale.com
State Superseded, archived
Headers show

Commit Message

Xiubo Li Aug. 19, 2014, 4:38 a.m. UTC
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Varka Bhadram <varkabhadram@gmail.com>
---
 .../devicetree/bindings/sound/fsl,esai.txt         | 73 ++++++++++++----------
 1 file changed, 39 insertions(+), 34 deletions(-)

Comments

Varka Bhadram Aug. 20, 2014, 8:16 a.m. UTC | #1
On Tuesday 19 August 2014 10:08 AM, Xiubo Li wrote:
> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
> Cc: Varka Bhadram <varkabhadram@gmail.com>
> ---
>   .../devicetree/bindings/sound/fsl,esai.txt         | 73 ++++++++++++----------
>   1 file changed, 39 insertions(+), 34 deletions(-)
>
Reviewed-by: Varka Bhadram <varkabhadram@gmail.com>

--
Regards,
Varka Bhadram.

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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt
index aeb8c4a..4dce656 100644
--- a/Documentation/devicetree/bindings/sound/fsl,esai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt
@@ -7,49 +7,54 @@  other DSPs. It has up to six transmitters and four receivers.
 
 Required properties:
 
-  - compatible : Compatible list, must contain "fsl,imx35-esai".
+- compatible:	Compatible list, must contain "fsl,imx35-esai".
 
-  - reg : Offset and length of the register set for the device.
+- reg:		Offset and length of the register set for the device.
 
-  - interrupts : Contains the spdif interrupt.
+- interrupts:	Contains the spdif interrupt.
 
-  - dmas : Generic dma devicetree binding as described in
-  Documentation/devicetree/bindings/dma/dma.txt.
+- dmas:		Generic dma devicetree binding as described in
+		Documentation/devicetree/bindings/dma/dma.txt.
 
-  - dma-names : Two dmas have to be defined, "tx" and "rx".
+- dma-names:	Two dmas have to be defined, "tx" and "rx".
 
-  - clocks: Contains an entry for each entry in clock-names.
+- clocks:	Contains an entry for each entry in clock-names.
 
-  - clock-names : Includes the following entries:
-	"core"		The core clock used to access registers
-	"extal"		The esai baud clock for esai controller used to derive
-			HCK, SCK and FS.
-	"fsys"		The system clock derived from ahb clock used to derive
-			HCK, SCK and FS.
+- clock-names:	Includes the following entries:
+		"core" -- The core clock used to access registers
+		"extal"-- The esai baud clock for esai controller used to
+		derive HCK, SCK and FS.
+		"fsys" -- The system clock derived from ahb clock used to
+		derive HCK, SCK and FS.
 
-  - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
-    This number is the maximum allowed value for TFCR[TFWM] or RFCR[RFWM].
+- fsl,fifo-depth:
+		The number of elements in the transmit and receive FIFOs.
+		This number is the maximum allowed value for TFCR[TFWM] or
+		RFCR[RFWM].
 
-  - fsl,esai-synchronous: This is a boolean property. If present, indicating
-    that ESAI would work in the synchronous mode, which means all the settings
-    for Receiving would be duplicated from Transmition related registers.
+- fsl,esai-synchronous:
+		This is a boolean property. If present, indicating that ESAI
+		would work in the synchronous mode, which means all the settings
+		for Receiving would be duplicated from Transmition related
+		registers.
 
-  - big-endian : If this property is absent, the native endian mode will
-    be in use as default, or the big endian mode will be in use for all the
-    device registers.
+- big-endian:
+		If this property is absent, the native endian mode will be in
+		use as default, or the big endian mode will be in use for all the
+		device registers.
 
 Example:
 
-esai: esai@02024000 {
-	compatible = "fsl,imx35-esai";
-	reg = <0x02024000 0x4000>;
-	interrupts = <0 51 0x04>;
-	clocks = <&clks 208>, <&clks 118>, <&clks 208>;
-	clock-names = "core", "extal", "fsys";
-	dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
-	dma-names = "rx", "tx";
-	fsl,fifo-depth = <128>;
-	fsl,esai-synchronous;
-	big-endian;
-	status = "disabled";
-};
+	esai: esai@02024000 {
+		compatible = "fsl,imx35-esai";
+		reg = <0x02024000 0x4000>;
+		interrupts = <0 51 0x04>;
+		clocks = <&clks 208>, <&clks 118>, <&clks 208>;
+		clock-names = "core", "extal", "fsys";
+		dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
+		dma-names = "rx", "tx";
+		fsl,fifo-depth = <128>;
+		fsl,esai-synchronous;
+		big-endian;
+		status = "disabled";
+	};