| Message ID | 1408416905-19771-16-git-send-email-b18965@freescale.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
On 08/18/2014 07:55 PM, Alison Wang wrote: > From: Wang Huan <b18965@freescale.com> > > This patch adds the TWR_LCD_RGB card/HDMI options and the common > configuration for DCU on LS1021ATWR board. > > Signed-off-by: Alison Wang <alison.wang@freescale.com> > --- > Change log: > v5: Change the patch order. > v4: Add commit messages. > v3: New file. > > board/freescale/ls1021atwr/Makefile | 1 + > board/freescale/ls1021atwr/dcu.c | 47 +++++++++++++++++++++++++++++++++ > board/freescale/ls1021atwr/ls1021atwr.c | 6 +++++ > include/configs/ls1021atwr.h | 18 +++++++++++++ > 4 files changed, 72 insertions(+) > create mode 100644 board/freescale/ls1021atwr/dcu.c > > diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile > index b5df668..01296c0 100644 > --- a/board/freescale/ls1021atwr/Makefile > +++ b/board/freescale/ls1021atwr/Makefile > @@ -5,3 +5,4 @@ > # > > obj-y += ls1021atwr.o > +obj-$(CONFIG_FSL_DCU_FB) += dcu.o > diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c > new file mode 100644 > index 0000000..8fe4ccb > --- /dev/null > +++ b/board/freescale/ls1021atwr/dcu.c > @@ -0,0 +1,47 @@ > +/* > + * Copyright 2014 Freescale Semiconductor, Inc. > + * > + * FSL DCU Framebuffer driver > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +#include <common.h> > +#include <fsl_dcu_fb.h> > +#include "div64.h" > +#include "../common/dcu_sii9022a.h" The order of this patch and 16/16 is wrong. This line fails until next patch is applied. Please reorder the patch to maintain git bisect workable. York
diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile index b5df668..01296c0 100644 --- a/board/freescale/ls1021atwr/Makefile +++ b/board/freescale/ls1021atwr/Makefile @@ -5,3 +5,4 @@ # obj-y += ls1021atwr.o +obj-$(CONFIG_FSL_DCU_FB) += dcu.o diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c new file mode 100644 index 0000000..8fe4ccb --- /dev/null +++ b/board/freescale/ls1021atwr/dcu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_dcu_fb.h> +#include "div64.h" +#include "../common/dcu_sii9022a.h" + +DECLARE_GLOBAL_DATA_PTR; + +unsigned int dcu_set_pixel_clock(unsigned int pixclock) +{ + unsigned long long div; + + div = (unsigned long long)(gd->bus_clk / 1000); + div *= (unsigned long long)pixclock; + do_div(div, 1000000000); + + return div; +} + +int platform_dcu_init(unsigned int xres, unsigned int yres, + const char *port, + struct fb_videomode *dcu_fb_videomode) +{ + const char *name; + unsigned int pixel_format; + + if (strncmp(port, "twr_lcd", 4) == 0) { + name = "TWR_LCD_RGB card"; + } else { + name = "HDMI"; + dcu_set_dvi_encoder(dcu_fb_videomode); + } + + printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); + + pixel_format = 32; + fsl_dcu_init(xres, yres, pixel_format); + + return 0; +} diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 7fdcbcd..e4364dd 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -264,6 +264,12 @@ int board_early_init_f(void) init_early_memctl_regs(); #endif +#ifdef CONFIG_FSL_DCU_FB + out_be32(&scfg->scfgrevcr, 0xffffffff); + out_be32(&scfg->pixclkcr, 0x80000000); + out_be32(&scfg->scfgrevcr, 0x00000000); +#endif + out_le32(&cci->ctrl_ord, 0x00000008); return 0; diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index f8cbe32..716143c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -177,6 +177,24 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_GENERIC_MMC /* + * Video + */ +#define CONFIG_FSL_DCU_FB + +#ifdef CONFIG_FSL_DCU_FB +#define CONFIG_VIDEO +#define CONFIG_CMD_BMP +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO + +#define CONFIG_FSL_DCU_SII9022A +#define CONFIG_SYS_I2C_DVI_BUS_NUM 1 +#define CONFIG_SYS_I2C_DVI_ADDR 0x39 +#endif + +/* * eTSEC */ #define CONFIG_TSEC_ENET