@@ -86,6 +86,7 @@ static void pc_q35_init(MachineState *machine)
DeviceState *icc_bridge;
PcGuestInfo *guest_info;
ram_addr_t lowmem;
+ DriveInfo *hd[MAX_SATA_PORTS];
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
@@ -253,6 +254,8 @@ static void pc_q35_init(MachineState *machine)
true, "ich9-ahci");
idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
+ ide_drive_get(hd, IF_AHCI, MAX_SATA_PORTS);
+ ahci_ide_create_devs(ahci, hd);
if (usb_enabled(false)) {
/* Should we create 6 UHCI according to ich9 spec? */
@@ -354,6 +357,7 @@ static QEMUMachine pc_q35_machine_v2_2 = {
.name = "pc-q35-2.2",
.alias = "q35",
.init = pc_q35_init,
+ .block_default_type = IF_AHCI,
};
#define PC_Q35_2_1_MACHINE_OPTIONS PC_Q35_2_2_MACHINE_OPTIONS
@@ -1403,3 +1403,20 @@ static void sysbus_ahci_register_types(void)
}
type_init(sysbus_ahci_register_types)
+
+void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
+{
+ AHCIPCIState *d = ICH_AHCI(dev);
+ AHCIState *ahci = &d->ahci;
+ unsigned i;
+
+ for (i = 0; i < ahci->ports; i++) {
+ if (hd_table[i] == NULL) {
+ continue;
+ }
+ fprintf(stderr, "ahci_ide_create_devs: ide_create_drive(bus:%p, 0, drive[index:%u])\n",
+ (void *)&ahci->dev[i].port, i);
+ ide_create_drive(&ahci->dev[i].port, 0, hd_table[i]);
+ }
+
+}
@@ -332,4 +332,6 @@ void ahci_uninit(AHCIState *s);
void ahci_reset(AHCIState *s);
+void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table);
+
#endif /* HW_IDE_AHCI_H */
Signed-off-by: John Snow <jsnow@redhat.com> --- hw/i386/pc_q35.c | 4 ++++ hw/ide/ahci.c | 17 +++++++++++++++++ hw/ide/ahci.h | 2 ++ 3 files changed, 23 insertions(+)