diff mbox

[i386,AVX512,16/n] Add AVX-512BW's psadbw insn.

Message ID 20140815113748.GB35144@msticlxl57.ims.intel.com
State New
Headers show

Commit Message

Kirill Yukhin Aug. 15, 2014, 11:37 a.m. UTC
Hello,
This patch introduces AVX-512BW's psadbw insn pattern.

Bootstrapped.
New tests on top of patch-set all pass
under simulator.

Is it ok for trunk?

gcc/
	* config/i386/sse.md
	(define_mode_iterator VI8_AVX2_AVX512BW): New.
	(define_insn "<sse2_avx2>_psadbw"): Add evex version.

--
Thanks, K

Comments

Uros Bizjak Aug. 15, 2014, 6:03 p.m. UTC | #1
On Fri, Aug 15, 2014 at 1:37 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> This patch introduces AVX-512BW's psadbw insn pattern.
>
> Bootstrapped.
> New tests on top of patch-set all pass
> under simulator.
>
> Is it ok for trunk?
>
> gcc/
>         * config/i386/sse.md
>         (define_mode_iterator VI8_AVX2_AVX512BW): New.
>         (define_insn "<sse2_avx2>_psadbw"): Add evex version.

OK.

Thanks,
Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 0660ae4..5f51c3a 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -288,6 +288,9 @@ 
   [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
    (V8DI "TARGET_AVX512F")])
 
+(define_mode_iterator VI8_AVX2_AVX512BW
+  [(V8DI "TARGET_AVX512BW") (V4DI "TARGET_AVX2") V2DI])
+
 (define_mode_iterator VI8_AVX2
   [(V4DI "TARGET_AVX2") V2DI])
 
@@ -10976,10 +10979,10 @@ 
 ;; The correct representation for this is absolutely enormous, and
 ;; surely not generally useful.
 (define_insn "<sse2_avx2>_psadbw"
-  [(set (match_operand:VI8_AVX2 0 "register_operand" "=x,x")
-	(unspec:VI8_AVX2
-	  [(match_operand:<ssebytemode> 1 "register_operand" "0,x")
-	   (match_operand:<ssebytemode> 2 "nonimmediate_operand" "xm,xm")]
+  [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand" "=x,v")
+	(unspec:VI8_AVX2_AVX512BW
+	  [(match_operand:<ssebytemode> 1 "register_operand" "0,v")
+	   (match_operand:<ssebytemode> 2 "nonimmediate_operand" "xm,vm")]
 	  UNSPEC_PSADBW))]
   "TARGET_SSE2"
   "@
@@ -10989,7 +10992,7 @@ 
    (set_attr "type" "sseiadd")
    (set_attr "atom_unit" "simul")
    (set_attr "prefix_data16" "1,*")
-   (set_attr "prefix" "orig,vex")
+   (set_attr "prefix" "orig,maybe_evex")
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "<sse>_movmsk<ssemodesuffix><avxsizesuffix>"