diff mbox

Fix vec_extract_lo constraint.

Message ID 20140805143637.GB53035@msticlxl7.ims.intel.com
State New
Headers show

Commit Message

Ilya Tocar Aug. 5, 2014, 2:36 p.m. UTC 
> I'd suggest op0: "=<store_mask_constraint>,v" and op1: "v,m". This
> would result in op0:"=vm,v" op1:"v,m" and op0:"=v,v" op1:"v,m".
> 
> Uros.

Done.

2014-08-05  Ilya Tocar  <ilya.tocar@intel.com>

        * common/config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Fix
        constraint.

---
 gcc/config/i386/sse.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Uros Bizjak Aug. 5, 2014, 2:37 p.m. UTC | #1 
On Tue, Aug 5, 2014 at 4:36 PM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
>> I'd suggest op0: "=<store_mask_constraint>,v" and op1: "v,m". This
>> would result in op0:"=vm,v" op1:"v,m" and op0:"=v,v" op1:"v,m".
>>
>> Uros.
>
> Done.
>
> 2014-08-05  Ilya Tocar  <ilya.tocar@intel.com>
>
>         * common/config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Fix
>         constraint.

OK wverywhere.

Thanks,
Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 0f7ca27..3337104 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -5999,9 +5999,9 @@ 
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "vec_extract_lo_<mode><mask_name>"
-  [(set (match_operand:<ssehalfvecmode> 0 "<store_mask_predicate>" "=<store_mask_constraint>")
+  [(set (match_operand:<ssehalfvecmode> 0 "<store_mask_predicate>" "=<store_mask_constraint>,v")
 	(vec_select:<ssehalfvecmode>
-	  (match_operand:V8FI 1 "nonimmediate_operand" "vm")
+	  (match_operand:V8FI 1 "nonimmediate_operand" "v,m")
 	  (parallel [(const_int 0) (const_int 1)
             (const_int 2) (const_int 3)])))]
   "TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"