diff mbox

[v2,2/2] hw/arm/vexpress: add SP810 to the vexpress

Message ID 1407231171-19572-3-git-send-email-aggelerf@ethz.ch
State New
Headers show

Commit Message

Fabian Aggeler Aug. 5, 2014, 9:32 a.m. UTC 
The SP810, which is present in the Versatile Express motherboards,
allows to set the timing reference to either REFCLK or TIMCLK.
QEMU currently sets the SP804 timer to 1MHz by default. To reflect
this, we set the TimerEn0Sel, TimerEn1Sel, TimerEn2Sel, and
TimerEn3Sel of the system control register (SCCTRL) to TIMCLK (1).

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
---
 hw/arm/vexpress.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index a88732c..0b6d31a 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -34,6 +34,7 @@ 
 #include "hw/block/flash.h"
 #include "sysemu/device_tree.h"
 #include "qemu/error-report.h"
+#include "hw/misc/arm_sp810.h"
 #include <libfdt.h>
 
 #define VEXPRESS_BOARD_ID 0x8e0
@@ -575,7 +576,10 @@  static void vexpress_common_init(VEDBoardInfo *daughterboard,
     qdev_init_nofail(sysctl);
     sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);
 
-    /* VE_SP810: not modelled */
+    /* VE_SP810 (SP804 running at 1MHz (TIMCLK) by default) */
+    sp810_init(map[VE_SP810], SCCTRL_TIMEREN0SEL | SCCTRL_TIMEREN1SEL
+                            | SCCTRL_TIMEREN2SEL | SCCTRL_TIMEREN3SEL);
+
     /* VE_SERIALPCI: not modelled */
 
     pl041 = qdev_create(NULL, "pl041");