| Message ID | 53DF9246.2000009@arm.com |
|---|---|
| State | New |
| Headers | show |
On 04/08/14 15:01, Kyrill Tkachov wrote: > Hi all, > > Now that both backends have a way of generating CRC32 instructions this > patch adds the crc type to the scheduling information for the Cortex-A53 > and Cortex-A57 cores. > For both Cortex-A53 and Cortex-A57 they behave similarly to shifted > arithmetic instructions > > When scheduling for the Cortex-A57 we use the Cortex-A15 pipeline > description, so the crc type is added to cortex-a15.md. > CRC32 instructions can only be generated when targeting ARMv8-A so this > will not affect codegen when tuning for the ARMv7-A Cortex-A15 core. > > Ok for trunk? > > 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type > to reservation. > * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise. > > OK. R.
commit 5efe4a288368d3fc291aae86ca426acf8716901a
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Tue Jun 17 16:57:55 2014 +0100
[ARM/AArch64] Add scheduling information for CRC32 instructions
diff --git a/gcc/config/arm/cortex-a15.md b/gcc/config/arm/cortex-a15.md
index 54f3bea..cff9aa2 100644
--- a/gcc/config/arm/cortex-a15.md
+++ b/gcc/config/arm/cortex-a15.md
@@ -72,11 +72,14 @@
"ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)")
;; ALU ops with immediate shift
+;; crc is also included here so that appropriate scheduling of CRC32 ARMv8-A
+;; instructions can be performed when tuning for the Cortex-A57 since that
+;; core reuses the Cortex-A15 pipeline description for the moment.
(define_insn_reservation "cortex_a15_alu_shift" 3
(and (eq_attr "tune" "cortexa15")
(eq_attr "type" "extend,\
alu_shift_imm,alus_shift_imm,\
- logic_shift_imm,logics_shift_imm,\
+ crc,logic_shift_imm,logics_shift_imm,\
mov_shift,mvn_shift"))
"ca15_issue1,(ca15_sx1,ca15_sx1+ca15_sx1_shf,ca15_sx1_alu)\
|(ca15_sx2,ca15_sx2+ca15_sx2_shf,ca15_sx2_alu)")
diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md
index a629bd6..e342cb2 100644
--- a/gcc/config/arm/cortex-a53.md
+++ b/gcc/config/arm/cortex-a53.md
@@ -84,7 +84,7 @@
(define_insn_reservation "cortex_a53_alu_shift" 2
(and (eq_attr "tune" "cortexa53")
(eq_attr "type" "alu_shift_imm,alus_shift_imm,\
- logic_shift_imm,logics_shift_imm,\
+ crc,logic_shift_imm,logics_shift_imm,\
alu_shift_reg,alus_shift_reg,\
logic_shift_reg,logics_shift_reg,\
extend,mov_shift,mov_shift_reg,\
Hi all, Now that both backends have a way of generating CRC32 instructions this patch adds the crc type to the scheduling information for the Cortex-A53 and Cortex-A57 cores. For both Cortex-A53 and Cortex-A57 they behave similarly to shifted arithmetic instructions When scheduling for the Cortex-A57 we use the Cortex-A15 pipeline description, so the crc type is added to cortex-a15.md. CRC32 instructions can only be generated when targeting ARMv8-A so this will not affect codegen when tuning for the ARMv7-A Cortex-A15 core. Ok for trunk? 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type to reservation. * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.