@@ -40,7 +40,7 @@ COBJS-$(CONFIG_SPL_BUILD) += foo.o
The building of SPL images can be with:
-#define CONFIG_SPL
+#define CONFIG_SPL 1
Because SPL images normally have a different text base, one has to be
configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
@@ -23,7 +23,7 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -25,7 +25,7 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
@@ -41,7 +41,7 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
@@ -24,8 +24,8 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -19,7 +19,7 @@
#define CONFIG_MPC8313ERDB 1
#ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
@@ -21,7 +21,7 @@
#define CONFIG_NAND_FSL_IFC
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
@@ -56,7 +56,7 @@
#define CONFIG_SYS_TEXT_BASE 0x11000000
#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
#else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
@@ -88,7 +88,7 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -108,7 +108,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#else
-#define CONFIG_TPL
+#define CONFIG_TPL 1
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -16,7 +16,7 @@
#endif
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -45,7 +45,7 @@
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -79,8 +79,8 @@
#define CONFIG_SYS_NAND_MAX_OOBFREE 5
#ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -36,7 +36,7 @@
#endif
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -64,7 +64,7 @@
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -93,8 +93,8 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -22,7 +22,7 @@
#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg
#endif
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -53,7 +53,7 @@
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
#endif
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -42,7 +42,7 @@
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -25,7 +25,7 @@
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -412,7 +412,7 @@
/*
* SPL related defines
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NOR_SUPPORT
@@ -211,7 +211,7 @@
#undef CONFIG_USE_IRQ
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
/*
* Place the image at the start of the ROM defined image space.
@@ -298,7 +298,7 @@
GENERATED_GBL_DATA_SIZE)
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
@@ -307,7 +307,7 @@
GENERATED_GBL_DATA_SIZE)
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
@@ -37,7 +37,7 @@
/*
* SPL
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
@@ -121,7 +121,7 @@
/* MMC SPL */
#define CONFIG_EXYNOS_SPL
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -164,7 +164,7 @@
* under common/spl/. Given our generally common memory map, we set a
* number of related defaults and sizes here.
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
/*
* Place the image at the start of the ROM defined image space.
@@ -199,7 +199,7 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
@@ -319,7 +319,7 @@
#define CONFIG_OMAP3_SPI
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
@@ -368,7 +368,7 @@
#ifndef CONFIG_DIRECT_NOR_BOOT
/* defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
@@ -283,7 +283,7 @@
#define CONFIG_SYS_SRAM_SIZE 0x10000
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
@@ -136,7 +136,7 @@
#define CONFIG_TPM_TIS_I2C_SLAVE_ADDR 0x20
/* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -46,7 +46,7 @@
#endif
/* Spl */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SUPPORT
@@ -298,7 +298,7 @@
"-(rootfs)"
/* defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
@@ -665,7 +665,7 @@
* SPL related defines
*/
#ifdef CONFIG_LCD4_LWMON5
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NOR_SUPPORT
@@ -252,7 +252,7 @@
/*
* NAND SPL
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
#define CONFIG_SPL_BOARD_INIT
@@ -348,7 +348,7 @@
GENERATED_GBL_DATA_SIZE)
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
@@ -448,7 +448,7 @@
#endif
/* SPL part */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -29,7 +29,7 @@
#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
@@ -50,7 +50,7 @@
#define CONFIG_ARCH_MISC_INIT
/* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
@@ -260,7 +260,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
@@ -65,7 +65,7 @@
#undef CONFIG_CMD_NFS
/* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_TEXT_BASE 0x02021410
@@ -148,7 +148,7 @@
#endif
#ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -177,7 +177,7 @@
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
@@ -207,8 +207,8 @@
#endif
#ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SPL_NAND_BOOT
#define CONFIG_SPL_FLUSH_IMAGE
@@ -205,7 +205,7 @@
/*
* SPL
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_TEXT_BASE 0xa1700000 /* IPL loads SPL here */
#define CONFIG_SPL_STACK 0x5c040000 /* end of internal SRAM */
#define CONFIG_SPL_NAND_SUPPORT /* build libnand for spl */
@@ -197,7 +197,7 @@
#define CONFIG_ENV_IS_NOWHERE
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
/*
@@ -209,7 +209,7 @@
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE 0x10000
@@ -244,7 +244,7 @@
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
/* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x300000
#define CONFIG_SPL_MAX_SIZE 0x10000
@@ -139,7 +139,7 @@
#define CONFIG_SYS_I2C_OMAP24XX
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x402F0400
#define CONFIG_SPL_MAX_SIZE (101 * 1024)
@@ -76,7 +76,7 @@
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define COPY_BL2_FNPTR_ADDR 0x00002488
@@ -223,7 +223,7 @@
*/
/* Enable building of SPL globally */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
/* TEXT_BASE for linking the SPL binary */
@@ -128,7 +128,7 @@
#ifdef CONFIG_SPL_FEL
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
#define CONFIG_SPL_TEXT_BASE 0x2000
@@ -219,7 +219,7 @@
#define CONFIG_NET_RETRY_COUNT 10
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_CONSOLE
@@ -305,7 +305,7 @@
#define CONGIG_CMD_STORAGE
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
@@ -131,7 +131,7 @@
#define CONFIG_CMD_ENTERRCM
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_RAM_DEVICE
#define CONFIG_SPL_BOARD_INIT
@@ -168,7 +168,7 @@
#define CONFIG_ENV_IS_NOWHERE
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40300000
#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024)
@@ -134,7 +134,7 @@
/* SPL */
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40400000
#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024)
@@ -198,7 +198,7 @@
*/
#if !defined(CONFIG_NOR_BOOT) && \
!(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_OS_BOOT
@@ -331,7 +331,7 @@
#define CONFIG_SYS_SRAM_SIZE 0x10000
/* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
@@ -21,7 +21,7 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
@@ -17,7 +17,7 @@
#define CONFIG_SYS_TEXT_BASE 0xa0000000
#ifdef CONFIG_ONENAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_ONENAND_SUPPORT
#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
#define CONFIG_SPL_ONENAND_LOAD_SIZE \
@@ -20,7 +20,7 @@
/*
* SPL
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -274,7 +274,7 @@
/*
* SPL related defines
*/
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_SPL_TEXT_BASE 0xd2800b00
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
@@ -257,7 +257,7 @@
#define CONFIG_CMD_TFTPPUT
/* SPL part */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT