From patchwork Fri Oct 30 12:21:01 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 37296 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CAB73B7C3D for ; Sat, 31 Oct 2009 00:27:10 +1100 (EST) Received: from localhost ([127.0.0.1]:43435 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3rVS-0005us-FT for incoming@patchwork.ozlabs.org; Fri, 30 Oct 2009 09:27:06 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N3qVv-0001yq-39 for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N3qVj-0001oz-1v for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:26 -0400 Received: from [199.232.76.173] (port=52358 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3qVh-0001or-KW for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:17 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:34042) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N3qVf-0002rQ-7o for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:16 -0400 Received: from nm.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with ESMTP id D1B6418057; Fri, 30 Oct 2009 21:23:04 +0900 (JST) Received: from yamahata by nm.local.valinux.co.jp with local (Exim 4.69) (envelope-from ) id 1N3qTv-0006d0-GR; Fri, 30 Oct 2009 21:21:27 +0900 From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com Date: Fri, 30 Oct 2009 21:21:01 +0900 Message-Id: <1256905286-25435-8-git-send-email-yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1256905286-25435-1-git-send-email-yamahata@valinux.co.jp> References: <1256905286-25435-1-git-send-email-yamahata@valinux.co.jp> X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp Subject: [Qemu-devel] [PATCH V6 07/32] pci/bridge: clean up of pci_bridge_initfn() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org - use symbolic constant - use helper function pci_set_xxx() - removed lines which initializes to 0. It is unnecessary because it is already zeroed. - add some comments on command registers. Some initial values are suspicious because they seems to be specific to apb_pci.c which is the only user of pci bridge right now. For now don't touch those values to avoid breakage. Signed-off-by: Isaku Yamahata Acked-by: Michael S. Tsirkin --- hw/pci.c | 36 +++++++++++++++++++++++++----------- 1 files changed, 25 insertions(+), 11 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index ab5eff8..6abb0e2 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -922,17 +922,31 @@ static int pci_bridge_initfn(PCIDevice *dev) pci_config_set_vendor_id(s->dev.config, s->vid); pci_config_set_device_id(s->dev.config, s->did); - s->dev.config[0x04] = 0x06; // command = bus master, pci mem - s->dev.config[0x05] = 0x00; - s->dev.config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error - s->dev.config[0x07] = 0x00; // status = fast devsel - s->dev.config[0x08] = 0x00; // revision - s->dev.config[0x09] = 0x00; // programming i/f - pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI); - s->dev.config[0x0D] = 0x10; // latency_timer - s->dev.config[PCI_HEADER_TYPE] = - PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE; // header_type - s->dev.config[0x1E] = 0xa0; // secondary status + /* TODO: intial value + * command register: + * According to PCI bridge spec, after reset + * bus master bit is off + * memory space enable bit is off + * According to manual (805-1251.pdf).(See abp_pbi.c for its links.) + * the reset value should be zero unless the boot pin is tied high + * (which is tru) and thus it should be PCI_COMMAND_MEMORY. + * + * For now, don't touch the value. + * Later command register will be set to zero and apb_pci.c will + * override the value. + * Same for latency timer, and multi function bit of header type. + */ + pci_set_word(dev->config + PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + + pci_set_word(dev->config + PCI_STATUS, + PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); + pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI); + dev->config[PCI_LATENCY_TIMER] = 0x10; + dev->config[PCI_HEADER_TYPE] = + PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE; + pci_set_word(dev->config + PCI_SEC_STATUS, + PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); return 0; }