From patchwork Fri Oct 30 12:21:05 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 37275 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8095EB7C34 for ; Fri, 30 Oct 2009 23:31:57 +1100 (EST) Received: from localhost ([127.0.0.1]:49542 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3qdy-0005XM-5E for incoming@patchwork.ozlabs.org; Fri, 30 Oct 2009 08:31:50 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N3qVq-0001uC-42 for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:26 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N3qVe-0001n2-C9 for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:19 -0400 Received: from [199.232.76.173] (port=52345 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3qVe-0001mw-6s for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:14 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:34040) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N3qVd-0002rN-8V for qemu-devel@nongnu.org; Fri, 30 Oct 2009 08:23:13 -0400 Received: from nm.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with ESMTP id F3F3D1805B; Fri, 30 Oct 2009 21:23:04 +0900 (JST) Received: from yamahata by nm.local.valinux.co.jp with local (Exim 4.69) (envelope-from ) id 1N3qTv-0006dD-LK; Fri, 30 Oct 2009 21:21:27 +0900 From: Isaku Yamahata To: qemu-devel@nongnu.org, mst@redhat.com Date: Fri, 30 Oct 2009 21:21:05 +0900 Message-Id: <1256905286-25435-12-git-send-email-yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1256905286-25435-1-git-send-email-yamahata@valinux.co.jp> References: <1256905286-25435-1-git-send-email-yamahata@valinux.co.jp> X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp Subject: [Qemu-devel] [PATCH V6 11/32] pci: make pci_bar() aware of header type 1. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org make pci_bar() aware of header type 1. When PCI_ROM_SLOT it should return PCI_ROM_ADDRESS1 (!= PCI_ROM_ADDRESS) Signed-off-by: Isaku Yamahata Acked-by: Michael S. Tsirkin --- hw/pci.c | 18 ++++++++++++------ hw/pci.h | 1 + 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 6b89177..3315820 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -84,9 +84,15 @@ static const VMStateDescription vmstate_pcibus = { } }; -static inline int pci_bar(int reg) +static int pci_bar(PCIDevice *d, int reg) { - return reg == PCI_ROM_SLOT ? PCI_ROM_ADDRESS : PCI_BASE_ADDRESS_0 + reg * 4; + uint8_t type; + + if (reg != PCI_ROM_SLOT) + return PCI_BASE_ADDRESS_0 + reg * 4; + + type = d->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION; + return type == PCI_HEADER_TYPE_BRIDGE ? PCI_ROM_ADDRESS1 : PCI_ROM_ADDRESS; } static void pci_device_reset(PCIDevice *dev) @@ -102,7 +108,7 @@ static void pci_device_reset(PCIDevice *dev) if (!dev->io_regions[r].size) { continue; } - pci_set_long(dev->config + pci_bar(r), dev->io_regions[r].type); + pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type); } pci_update_mappings(dev); } @@ -472,7 +478,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, r->map_func = map_func; wmask = ~(size - 1); - addr = pci_bar(region_num); + addr = pci_bar(pci_dev, region_num); if (region_num == PCI_ROM_SLOT) { /* ROM enable bit is writeable */ wmask |= PCI_ROM_ADDRESS_ENABLE; @@ -494,7 +500,7 @@ static void pci_update_mappings(PCIDevice *d) if (r->size != 0) { if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { if (cmd & PCI_COMMAND_IO) { - new_addr = pci_get_long(d->config + pci_bar(i)); + new_addr = pci_get_long(d->config + pci_bar(d, i)); new_addr = new_addr & ~(r->size - 1); last_addr = new_addr + r->size - 1; /* NOTE: we have only 64K ioports on PC */ @@ -507,7 +513,7 @@ static void pci_update_mappings(PCIDevice *d) } } else { if (cmd & PCI_COMMAND_MEMORY) { - new_addr = pci_get_long(d->config + pci_bar(i)); + new_addr = pci_get_long(d->config + pci_bar(d, i)); /* the ROM slot has a specific enable bit */ if (i == PCI_ROM_SLOT && !(new_addr & PCI_ROM_ADDRESS_ENABLE)) goto no_mem_map; diff --git a/hw/pci.h b/hw/pci.h index bbce56b..e9ba6d3 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -120,6 +120,7 @@ typedef struct PCIIORegion { #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ +#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */ #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ #define PCI_MIN_GNT 0x3e /* 8 bits */