diff mbox

[AArch64/GCC,1/N] GNU-Stylize some un-formatted code

Message ID 53CE79E0.2070804@arm.com
State New
Headers show

Commit Message

Jiong Wang July 22, 2014, 2:49 p.m. UTC
indenting and making sure columns less than 80 in
the following functions:
   * aarch64_save_or_restore_fprs
   * aarch64_save_or_restore_callee_save_registers

*no functional change*

OK to install?

thanks.

gcc/
   * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): GNU-Stylize code.
   (aarch64_save_or_restore_callee_save_registers): Likewise.
   (aarch64_expand_prologue): Likewise

Comments

Marcus Shawcroft July 23, 2014, 3:59 p.m. UTC | #1
On 22 July 2014 15:49, Jiong Wang <jiong.wang@arm.com> wrote:

> gcc/
>   * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): GNU-Stylize
> code.
>   (aarch64_save_or_restore_callee_save_registers): Likewise.
>   (aarch64_expand_prologue): Likewise

OK and applied.
/Marcus
diff mbox

Patch

>From 8dfc75f858b76bc116311fa98d74d8e73e166d39 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Tue, 17 Jun 2014 21:31:34 +0100
Subject: [PATCH 01/19] [AArch64][1/20] GNU-Stylize some code

GNU-Stylize some code in the following functions.

aarch64_save_or_restore_fprs
aarch64_save_or_restore_callee_save_registers

the modifications are indenting code, making sure columns less then 80 only.

*no functional change*

2014-06-16  Jiong Wang <jiong.wang@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>

gcc/
  * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): GNU-Stylize code.
  (aarch64_save_or_restore_callee_save_registers): Likewise.
  (aarch64_expand_prologue): Likewise.
---
 gcc/config/aarch64/aarch64.c |   50 +++++++++++++++++++++++-------------------
 1 file changed, 27 insertions(+), 23 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f2968ff..b3989e8 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1914,8 +1914,8 @@  aarch64_save_or_restore_fprs (int start_offset, int increment,
   unsigned regno;
   unsigned regno2;
   rtx insn;
-  rtx (*gen_mem_ref)(enum machine_mode, rtx)
-    = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
+  rtx (*gen_mem_ref) (enum machine_mode, rtx)
+    = frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM;
 
   for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
     {
@@ -1935,8 +1935,8 @@  aarch64_save_or_restore_fprs (int start_offset, int increment,
 	      /* Empty loop.  */
 	    }
 
-	  if (regno2 <= V31_REGNUM &&
-	      aarch64_register_saved_on_entry (regno2))
+	  if (regno2 <= V31_REGNUM
+	      && aarch64_register_saved_on_entry (regno2))
 	    {
 	      rtx mem2;
 
@@ -1949,15 +1949,15 @@  aarch64_save_or_restore_fprs (int start_offset, int increment,
 	      if (restore == false)
 		{
 		  insn = emit_insn
-		    ( gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno),
-					mem2, gen_rtx_REG (DFmode, regno2)));
+		    (gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno),
+				       mem2, gen_rtx_REG (DFmode, regno2)));
 
 		}
 	      else
 		{
 		  insn = emit_insn
-		    ( gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem,
-				       gen_rtx_REG (DFmode, regno2), mem2));
+		    (gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem,
+				      gen_rtx_REG (DFmode, regno2), mem2));
 
 		  add_reg_note (insn, REG_CFA_RESTORE,
 				gen_rtx_REG (DFmode, regno));
@@ -2001,8 +2001,9 @@  aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
   rtx base_rtx = stack_pointer_rtx;
   HOST_WIDE_INT start_offset = offset;
   HOST_WIDE_INT increment = UNITS_PER_WORD;
-  rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
-  unsigned limit = (frame_pointer_needed)? R28_REGNUM: R30_REGNUM;
+  rtx (*gen_mem_ref) (enum machine_mode, rtx) = (frame_pointer_needed
+						 ? gen_frame_mem : gen_rtx_MEM);
+  unsigned limit = frame_pointer_needed ? R28_REGNUM : R30_REGNUM;
   unsigned regno;
   unsigned regno2;
 
@@ -2023,8 +2024,8 @@  aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
 	    {
 	      /* Empty loop.  */
 	    }
-	  if (regno2 <= limit &&
-	      aarch64_register_saved_on_entry (regno2))
+	  if (regno2 <= limit
+	      && aarch64_register_saved_on_entry (regno2))
 	    {
 	      rtx mem2;
 
@@ -2037,18 +2038,20 @@  aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
 	      if (restore == false)
 		{
 		  insn = emit_insn
-		    ( gen_store_pairdi (mem, gen_rtx_REG (DImode, regno),
-					mem2, gen_rtx_REG (DImode, regno2)));
+		    (gen_store_pairdi (mem, gen_rtx_REG (DImode, regno),
+				       mem2, gen_rtx_REG (DImode, regno2)));
 
 		}
 	      else
 		{
 		  insn = emit_insn
-		    ( gen_load_pairdi (gen_rtx_REG (DImode, regno), mem,
-				     gen_rtx_REG (DImode, regno2), mem2));
+		    (gen_load_pairdi (gen_rtx_REG (DImode, regno), mem,
+				      gen_rtx_REG (DImode, regno2), mem2));
 
-		  add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
-		  add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2));
+		  add_reg_note (insn, REG_CFA_RESTORE,
+				gen_rtx_REG (DImode, regno));
+		  add_reg_note (insn, REG_CFA_RESTORE,
+				gen_rtx_REG (DImode, regno2));
 		}
 
 	      /* The first part of a frame-related parallel insn is
@@ -2066,7 +2069,8 @@  aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
 	      else
 		{
 		  insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem);
-		  add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno));
+		  add_reg_note (insn, REG_CFA_RESTORE,
+				gen_rtx_REG (DImode, regno));
 		}
 	      start_offset += increment;
 	    }
@@ -2470,10 +2474,10 @@  aarch64_expand_epilogue (bool for_sibcall)
 	    }
 	}
 
-        aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx,
-					     plus_constant (Pmode,
-							    stack_pointer_rtx,
-							    offset)));
+      aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx,
+					   plus_constant (Pmode,
+							  stack_pointer_rtx,
+							  offset)));
     }
 
   emit_use (gen_rtx_REG (DImode, LR_REGNUM));
-- 
1.7.9.5