| Message ID | 1405689996-3601-1-git-send-email-suravee.suthikulpanit@amd.com |
|---|---|
| State | Not Applicable |
| Headers | show |
On Fri, Jul 18, 2014 at 08:26:36AM -0500, suravee.suthikulpanit@amd.com wrote: > From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> > > It's not quite clear that msi-controller is already checked > by of_msi_chip_add. So, this patch add a note to clarify. > > Also, clean up redundant logic and unnecessary pr_info. > > Cc: Mark Rutland <Mark.Rutland@arm.com> > Cc: Marc Zyngier <Marc.Zyngier@arm.com> > Cc: Jason Cooper <jason@lakedaemon.net> > Cc: Catalin Marinas <Catalin.Marinas@arm.com> > Cc: Will Deacon <Will.Deacon@arm.com> > Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> > --- > > Note: This patch is created against irqchip/gic branch. > > drivers/irqchip/irq-gic-v2m.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) Applied to the unstable branch irqchip/gic-v2m until Marc returns from vacation. Please see my email to MarkR on your previous series regarding the re-shuffling of the branches. thx, Jason. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index e54ca1d..94ed8d6 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -235,15 +235,15 @@ gicv2m_of_init(struct device_node *node, struct device_node *parent) gic->msi_chip.teardown_irq = gicv2m_teardown_msi_irq; ret = of_pci_msi_chip_add(&gic->msi_chip); if (ret) { - /* MSI is optional and not supported here */ - pr_info("GICv2m: MSI is not supported.\n"); + /* + * Note: msi-controller is checked in of_pci_msi_chip_add(). + * MSI support is optional, and enabled only if msi-controller + * is specified. Hence, return 0. + */ return 0; } - ret = gicv2m_msi_init(node, &gic->v2m_data); - if (ret) - return ret; - return ret; + return gicv2m_msi_init(node, &gic->v2m_data); } IRQCHIP_DECLARE(arm_gic_400_v2m, "arm,gic-400-v2m", gicv2m_of_init);