Message ID | 1405334257-47501-1-git-send-email-agraf@suse.de |
---|---|
State | New |
Headers | show |
diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c index bcff074..7656951 100644 --- a/hw/nvram/mac_nvram.c +++ b/hw/nvram/mac_nvram.c @@ -66,6 +66,10 @@ static uint64_t macio_nvram_readb(void *opaque, hwaddr addr, static const MemoryRegionOps macio_nvram_ops = { .read = macio_nvram_readb, .write = macio_nvram_writeb, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 1, .endianness = DEVICE_BIG_ENDIAN, };
The NVRAM in our Core99 machine really supports 2byte and 4byte accesses just as well as 1byte accesses. In fact, Mac OS X uses those. Add support for higher register size granularities. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - Leave single-byte accesses, but mark the MMIO handler 4-byte capable with 1-byte granularity (thanks to Paolo for the suggestion!) --- hw/nvram/mac_nvram.c | 4 ++++ 1 file changed, 4 insertions(+)