Message ID | 1405138221-4721-3-git-send-email-hs@denx.de |
---|---|
State | Changes Requested |
Delegated to: | Stefano Babic |
Headers | show |
Hi Heiko, On 12/07/2014 06:10, Heiko Schocher wrote: > add IOMUXC_GPR1_USB_OTG_ID_OFFSET and IOMUXC_GPR1_USB_OTG_ID_SEL_MASK > define for the USB_OTG_ID_SEL bit. > > Signed-off-by: Heiko Schocher <hs@denx.de> > Cc: Stefano Babic <sbabic@denx.de> > > --- > - changes for v2: > - new > > arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h > index a69a753..7193118 100644 > --- a/arch/arm/include/asm/arch-mx6/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h > @@ -251,6 +251,8 @@ struct src { > /* GPR1 bitfields */ > #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET 21 > #define IOMUXC_GPR1_ENET_CLK_SEL_MASK (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET) > +#define IOMUXC_GPR1_USB_OTG_ID_OFFSET 13 > +#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK (1 << IOMUXC_GPR1_USB_OTG_ID_OFFSET) > > /* GPR3 bitfields */ > #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 > Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index a69a753..7193118 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -251,6 +251,8 @@ struct src { /* GPR1 bitfields */ #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET 21 #define IOMUXC_GPR1_ENET_CLK_SEL_MASK (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET) +#define IOMUXC_GPR1_USB_OTG_ID_OFFSET 13 +#define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK (1 << IOMUXC_GPR1_USB_OTG_ID_OFFSET) /* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29
add IOMUXC_GPR1_USB_OTG_ID_OFFSET and IOMUXC_GPR1_USB_OTG_ID_SEL_MASK define for the USB_OTG_ID_SEL bit. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> --- - changes for v2: - new arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 1 file changed, 2 insertions(+)