From patchwork Thu Jul 3 14:45:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mihai Caraman X-Patchwork-Id: 366896 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id F24C6140140 for ; Fri, 4 Jul 2014 00:46:27 +1000 (EST) Received: from ozlabs.org (ozlabs.org [103.22.144.67]) by lists.ozlabs.org (Postfix) with ESMTP id DD5051A02AD for ; Fri, 4 Jul 2014 00:46:27 +1000 (EST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2lp0242.outbound.protection.outlook.com [207.46.163.242]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3E66E1A0004 for ; Fri, 4 Jul 2014 00:45:41 +1000 (EST) Received: from BN3PR0301CA0061.namprd03.prod.outlook.com (25.160.152.157) by BL2PR03MB497.namprd03.prod.outlook.com (10.141.93.142) with Microsoft SMTP Server (TLS) id 15.0.969.15; Thu, 3 Jul 2014 14:45:35 +0000 Received: from BL2FFO11FD052.protection.gbl (2a01:111:f400:7c09::175) by BN3PR0301CA0061.outlook.office365.com (2a01:111:e400:401e::29) with Microsoft SMTP Server (TLS) id 15.0.974.11 via Frontend Transport; Thu, 3 Jul 2014 14:45:35 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD052.mail.protection.outlook.com (10.173.161.214) with Microsoft SMTP Server (TLS) id 15.0.969.12 via Frontend Transport; Thu, 3 Jul 2014 14:45:34 +0000 Received: from fsr-fed1764-012.ea.freescale.net (fsr-fed1764-012-010171073213.ea.freescale.net [10.171.73.213]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s63EjUPm021710; Thu, 3 Jul 2014 07:45:32 -0700 From: Mihai Caraman To: Subject: [RFC PATCH 1/4] powerpc/booke64: Add LRAT next and max entries to tlb_core_data structure Date: Thu, 3 Jul 2014 17:45:24 +0300 Message-ID: <1404398727-12844-2-git-send-email-mihai.caraman@freescale.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1404398727-12844-1-git-send-email-mihai.caraman@freescale.com> References: <1404398727-12844-1-git-send-email-mihai.caraman@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(97736001)(85852003)(76176999)(86362001)(106466001)(20776003)(105606002)(33646001)(26826002)(84676001)(77156001)(50466002)(31966008)(104016002)(50986999)(102836001)(62966002)(76482001)(92726001)(575784001)(83072002)(89996001)(48376002)(74502001)(93916002)(99396002)(47776003)(21056001)(95666004)(77982001)(69596002)(85306003)(68736004)(81542001)(19580395003)(74662001)(83322001)(19580405001)(104166001)(79102001)(36756003)(6806004)(229853001)(2351001)(80022001)(50226001)(46102001)(64706001)(4396001)(88136002)(87286001)(92566001)(44976005)(81342001)(81156004)(107046002)(109986001)(87936001)(217873001); DIR:OUT; SFP:; SCL:1; SRVR:BL2PR03MB497; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID: X-Forefront-PRVS: 0261CCEEDF Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=mihai.caraman@freescale.com; X-OriginatorOrg: freescale.com Cc: Mihai Caraman , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" LRAT (Logical to Real Address Translation) is shared between hw threads. Add LRAT next and max entries to tlb_core_data structure and initialize them. Signed-off-by: Mihai Caraman --- arch/powerpc/include/asm/mmu-book3e.h | 7 +++++++ arch/powerpc/include/asm/reg_booke.h | 1 + arch/powerpc/mm/fsl_booke_mmu.c | 8 ++++++++ 3 files changed, 16 insertions(+) diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h index 8d24f78..088fd9f 100644 --- a/arch/powerpc/include/asm/mmu-book3e.h +++ b/arch/powerpc/include/asm/mmu-book3e.h @@ -217,6 +217,12 @@ #define TLBILX_T_CLASS2 6 #define TLBILX_T_CLASS3 7 +/* LRATCFG bits */ +#define LRATCFG_ASSOC 0xFF000000 +#define LRATCFG_LASIZE 0x00FE0000 +#define LRATCFG_LPID 0x00002000 +#define LRATCFG_NENTRY 0x00000FFF + #ifndef __ASSEMBLY__ #include @@ -294,6 +300,7 @@ struct tlb_core_data { /* For software way selection, as on Freescale TLB1 */ u8 esel_next, esel_max, esel_first; + u8 lrat_next, lrat_max; }; #ifdef CONFIG_PPC64 diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 464f108..75bda23 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -64,6 +64,7 @@ #define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */ #define SPRN_LPID 0x152 /* Logical Partition ID */ #define SPRN_MAS8 0x155 /* MMU Assist Register 8 */ +#define SPRN_LRATCFG 0x156 /* LRAT Configuration Register */ #define SPRN_TLB0PS 0x158 /* TLB 0 Page Size Register */ #define SPRN_TLB1PS 0x159 /* TLB 1 Page Size Register */ #define SPRN_MAS5_MAS6 0x15c /* MMU Assist Register 5 || 6 */ diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index 94cd728..6492708 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c @@ -196,6 +196,14 @@ static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt, get_paca()->tcd.esel_next = i; get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY; get_paca()->tcd.esel_first = i; + + get_paca()->tcd.lrat_next = 0; + if (((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V2) && + (mfspr(SPRN_MMUCFG) & MMUCFG_LRAT)) { + get_paca()->tcd.lrat_max = mfspr(SPRN_LRATCFG) & LRATCFG_NENTRY; + } else { + get_paca()->tcd.lrat_max = 0; + } #endif return amount_mapped;