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[U-Boot,RFC,2/3] arm:vf610:Add SPI bus num in SOC level for SPI compatibility

Message ID 1404206287-9629-2-git-send-email-b44548@freescale.com
State RFC
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Chao Fu July 1, 2014, 9:18 a.m. UTC 
From: Chao Fu <B44548@freescale.com>

Add DSPI and QSPI bus definition in SOC level.
Sf probe command parameter bus will decide which module will work.

Add register base definition.

Signed-off-by: Chao Fu <B44548@freescale.com>
---
 arch/arm/include/asm/arch-vf610/imx-regs.h | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index bd6f680..3076975 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -95,6 +95,8 @@ 
 #define FEC_QUIRK_ENET_MAC
 #define I2C_QUIRK_REG
 
+#define SPI_BUS_FSL_QSPI0                               0
+
 /* MSCM interrupt rounter */
 #define MSCM_IRSPRC_CP0_EN				1
 #define MSCM_IRSPRC_NUM					112