Patchwork [v3,2/3] powerpc/fsl: 85xx: document cache-sram

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Submitter Vivek Mahajan
Date Oct. 21, 2009, 12:50 p.m.
Message ID <1256129459-10685-2-git-send-email-vivek.mahajan@freescale.com>
Download mbox | patch
Permalink /patch/36543/
State Superseded
Delegated to: Kumar Gala
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Comments

Vivek Mahajan - Oct. 21, 2009, 12:50 p.m.
Adds documentation for Freescale's QorIQ based cache-sram as under:-

* How to enable it from a low level driver
* How to set its size

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
---
v2, v3: No change over v1

 Documentation/powerpc/fsl_85xx_cache_sram.txt |   31 +++++++++++++++++++++++++
 1 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/powerpc/fsl_85xx_cache_sram.txt
Wolfgang Denk - Oct. 21, 2009, 5:50 p.m.
Dear Vivek Mahajan,

In message <1256129459-10685-2-git-send-email-vivek.mahajan@freescale.com> you wrote:
> Adds documentation for Freescale's QorIQ based cache-sram as under:-
> 
> * How to enable it from a low level driver
> * How to set its size
...
> +The size of the above cache SRAM memory window is passed via the
> +kernel command line as <cache-sram-size=....>

Would it not make more sense to configure this property through the
device tree? 

Best regards,

Wolfgang Denk
Scott Wood - Oct. 21, 2009, 6:01 p.m.
Wolfgang Denk wrote:
> Dear Vivek Mahajan,
> 
> In message <1256129459-10685-2-git-send-email-vivek.mahajan@freescale.com> you wrote:
>> Adds documentation for Freescale's QorIQ based cache-sram as under:-
>>
>> * How to enable it from a low level driver
>> * How to set its size
> ...
>> +The size of the above cache SRAM memory window is passed via the
>> +kernel command line as <cache-sram-size=....>
> 
> Would it not make more sense to configure this property through the
> device tree? 

The device tree describes the hardware.  It is not a kernel config tree.

-Scott
Vivek Mahajan - Oct. 22, 2009, 5:42 a.m.
Wolfgang Denk Sent: Wednesday, October 21, 2009 11:20 PM

> > * How to enable it from a low level driver
> > * How to set its size
> ...
> > +The size of the above cache SRAM memory window is passed via the 
> > +kernel command line as <cache-sram-size=....>
> 
> Would it not make more sense to configure this property 
> through the device tree? 

Since this parameter needs to be passed run time to the kernel 
and it was not preconfigured by u-boot; so it landed in the 
cmdline instead of the device tree.

> 
> Best regards,
> 
> Wolfgang Denk
> 

Thanks,
Vivek

Patch

diff --git a/Documentation/powerpc/fsl_85xx_cache_sram.txt b/Documentation/powerpc/fsl_85xx_cache_sram.txt
new file mode 100644
index 0000000..7f43e2a
--- /dev/null
+++ b/Documentation/powerpc/fsl_85xx_cache_sram.txt
@@ -0,0 +1,31 @@ 
+* Freescale QorIQ based Cache SRAM
+
+Freescale's QorIQ platforms provide an option of configuring
+a part of (or full) cache memory as SRAM. Any low level
+driver can use its APIs via selecting FSL_85XX_CACHE_SRAM as
+under for the case of gianfar ethernet driver:-
+
+In drivers/net/Kconfig:-
+
+config GIANFAR
+      ....
+      select FSL_85XX_CACHE_SRAM if MPC85xx
+      ....
+
+FSL_85XX_CACHE_SRAM and its base address are defined in
+arch/powerpc/platforms/85xx/Kconfig as under:-
+
+config FSL_85XX_CACHE_SRAM
+	bool
+	select PPC_LIB_RHEAP
+
+config FSL_85XX_CACHE_SRAM_BASE
+	hex
+	depends on FSL_85XX_CACHE_SRAM
+	default "0xfff00000"
+
+The size of the above cache SRAM memory window is passed via the
+kernel command line as <cache-sram-size=....>
+
+Absence of the above parameter in the kernel command line is
+treated as no cache SRAM.