From patchwork Thu Oct 15 05:32:15 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Neuling X-Patchwork-Id: 36048 X-Patchwork-Delegate: benh@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id A2B78B7DEA for ; Thu, 15 Oct 2009 16:32:23 +1100 (EST) Received: by ozlabs.org (Postfix) id 074FCB7B74; Thu, 15 Oct 2009 16:32:17 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from localhost.localdomain (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id CB035B7B68; Thu, 15 Oct 2009 16:32:16 +1100 (EST) Received: by localhost.localdomain (Postfix, from userid 1000) id 70A9B1EA08D; Thu, 15 Oct 2009 16:32:15 +1100 (EST) Received: from neuling.org (localhost [127.0.0.1]) by localhost.localdomain (Postfix) with ESMTP id 643E71EA08C; Thu, 15 Oct 2009 16:32:15 +1100 (EST) From: Michael Neuling To: benh@kernel.crashing.org Subject: [PATCH] powerpc perf events: Fix priority of MSR HV vs PR bits In-reply-to: <15714.1255583517@neuling.org> References: <15714.1255583517@neuling.org> Comments: In-reply-to Michael Neuling message dated "Thu, 15 Oct 2009 16:11:57 +1100." X-Mailer: MH-E 8.0.3; nmh 1.2; GNU Emacs 22.2.1 Date: Thu, 15 Oct 2009 16:32:15 +1100 Message-ID: <18412.1255584735@neuling.org> Cc: linuxppc-dev@ozlabs.org, Paul Mackerras X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org The architecture defines that if MSR PR is set we are in problem state irrespective of the HV bit. This fixes perf events to reflect this. Also, on bare metal systems, samples taken in Linux will now be reported as kernel rather than hypervisor. Signed-off-by: Michael Neuling CC: paulus@samba.org --- Paulus suggested that the comment needed updating to reflect the additional functionality that I've changed. arch/powerpc/kernel/perf_event.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/perf_event.c =================================================================== --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/perf_event.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/perf_event.c @@ -116,20 +116,23 @@ static inline void perf_get_data_addr(st static inline u32 perf_get_misc_flags(struct pt_regs *regs) { unsigned long mmcra = regs->dsisr; + unsigned long sihv = MMCRA_SIHV; + unsigned long sipr = MMCRA_SIPR; if (TRAP(regs) != 0xf00) return 0; /* not a PMU interrupt */ if (ppmu->flags & PPMU_ALT_SIPR) { - if (mmcra & POWER6_MMCRA_SIHV) - return PERF_RECORD_MISC_HYPERVISOR; - return (mmcra & POWER6_MMCRA_SIPR) ? - PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL; + sihv = POWER6_MMCRA_SIHV; + sipr = POWER6_MMCRA_SIPR; } - if (mmcra & MMCRA_SIHV) + + /* PR has priority over HV, so order below is important */ + if (mmcra & sipr) + return PERF_RECORD_MISC_USER; + if ((mmcra & sihv) && (freeze_events_kernel != MMCR0_FCHV)) return PERF_RECORD_MISC_HYPERVISOR; - return (mmcra & MMCRA_SIPR) ? PERF_RECORD_MISC_USER : - PERF_RECORD_MISC_KERNEL; + return PERF_RECORD_MISC_KERNEL; } /*