@@ -37,6 +37,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define GPIO_IN_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@@ -118,6 +121,28 @@ int board_mmc_init(bd_t *bis)
return 0;
}
+static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = {
+ /* SS1 */
+ NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL),
+ NEW_PAD_CTRL(MX6_PAD_EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
+ NEW_PAD_CTRL(MX6_PAD_EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
+ NEW_PAD_CTRL(MX6_PAD_EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
+};
+
+static unsigned const tqma6_ecspi1_cs[] = {
+ IMX_GPIO_NR(3, 19),
+};
+
+static void tqma6_iomuxc_spi(void)
+{
+ unsigned i;
+
+ for (i = 0; i < ARRAY_SIZE(tqma6_ecspi1_cs); ++i)
+ gpio_direction_output(tqma6_ecspi1_cs[i], 1);
+ imx_iomux_v3_setup_multiple_pads(tqma6_ecspi1_pads,
+ ARRAY_SIZE(tqma6_ecspi1_pads));
+}
+
int board_early_init_f(void)
{
return tqma6_bb_board_early_init_f();
@@ -128,6 +153,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+ tqma6_iomuxc_spi();
+
tqma6_bb_board_init();
return 0;
@@ -45,6 +45,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define GPIO_IN_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
#if defined(CONFIG_MX6Q)
#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII 0x02e0790
@@ -200,6 +203,26 @@ int tqma6_bb_board_mmc_init(bd_t *bis)
return 0;
}
+static iomux_v3_cfg_t const mba6_ecspi1_pads[] = {
+ NEW_PAD_CTRL(MX6_PAD_EIM_D24__GPIO3_IO24, SPI_PAD_CTRL),
+ NEW_PAD_CTRL(MX6_PAD_EIM_D25__GPIO3_IO25, SPI_PAD_CTRL),
+};
+
+static unsigned const mba6_ecspi1_cs[] = {
+ IMX_GPIO_NR(3, 24),
+ IMX_GPIO_NR(3, 25),
+};
+
+static void mba6_setup_iomuxc_spi(void)
+{
+ unsigned i;
+
+ for (i = 0; i < ARRAY_SIZE(mba6_ecspi1_cs); ++i)
+ gpio_direction_output(mba6_ecspi1_cs[i], 1);
+ imx_iomux_v3_setup_multiple_pads(mba6_ecspi1_pads,
+ ARRAY_SIZE(mba6_ecspi1_pads));
+}
+
int board_phy_config(struct phy_device *phydev)
{
#if defined(CONFIG_MX6Q)
@@ -279,6 +302,7 @@ int tqma6_bb_board_early_init_f(void)
int tqma6_bb_board_init(void)
{
+ mba6_setup_iomuxc_spi();
/* do it here - to have reset completed */
mba6_setup_iomuxc_enet();
@@ -47,6 +47,20 @@
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART
+/* SPI */
+#define CONFIG_CMD_SPI
+#define CONFIG_MXC_SPI
+
+/* SPI Flash */
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(3, 19) << 8))
+#define CONFIG_SF_DEFAULT_SPEED 50000000
+#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC