From patchwork Tue Oct 13 13:39:53 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gleb Natapov X-Patchwork-Id: 35859 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2F072B7BBA for ; Wed, 14 Oct 2009 00:40:41 +1100 (EST) Received: from localhost ([127.0.0.1]:57188 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MxhcE-0000i9-Im for incoming@patchwork.ozlabs.org; Tue, 13 Oct 2009 09:40:38 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mxhbe-0000fE-5g for qemu-devel@nongnu.org; Tue, 13 Oct 2009 09:40:02 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MxhbZ-0000Tx-AL for qemu-devel@nongnu.org; Tue, 13 Oct 2009 09:40:01 -0400 Received: from [199.232.76.173] (port=33946 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MxhbZ-0000Tb-6T for qemu-devel@nongnu.org; Tue, 13 Oct 2009 09:39:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:9099) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MxhbY-0002ec-8p for qemu-devel@nongnu.org; Tue, 13 Oct 2009 09:39:56 -0400 Received: from int-mx03.intmail.prod.int.phx2.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.16]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id n9DDdsgV024878; Tue, 13 Oct 2009 09:39:54 -0400 Received: from dhcp-1-237.tlv.redhat.com (dhcp-1-237.tlv.redhat.com [10.35.1.237]) by int-mx03.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id n9DDdrgU029488; Tue, 13 Oct 2009 09:39:54 -0400 Received: by dhcp-1-237.tlv.redhat.com (Postfix, from userid 13519) id 1186A18D410; Tue, 13 Oct 2009 15:39:53 +0200 (IST) Date: Tue, 13 Oct 2009 15:39:53 +0200 From: Gleb Natapov To: "Michael S. Tsirkin" Message-ID: <20091013133952.GH3026@redhat.com> References: <20091011215356.GC6411@redhat.com> <20091012065024.GS16702@redhat.com> <20091012095225.GA11741@redhat.com> <20091012100821.GE16702@redhat.com> <20091012110335.GA12546@redhat.com> <20091012114841.GF16702@redhat.com> <20091012115916.GA12834@redhat.com> <20091012120857.GI16702@redhat.com> <20091012132025.GA13022@redhat.com> <20091012142046.GC13357@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20091012142046.GC13357@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.16 X-detected-operating-system: by monty-python.gnu.org: Genre and OS details not recognized. Cc: kevin@koconnor.net, qemu-devel@nongnu.org Subject: [Qemu-devel] Re: seabios: fix low bits in ROM and I/O sizing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This cleans up handling of low bits during BAR sizing, to match PCI spec requirements, and to use symbolic constants from pci_regs.h Issues fixed: For ROM BARs, bit 0 is writeable (enable bit), which we not only don't want to set, but it will stick and make us think it's an I/O port resource. Further, PCI spec defines the following bits as reserved: - bit 1 in I/O BAR - bits 10:1 in ROM BAR and we should be careful and preserve any values there, and should ignore anything we read from these registers. Bits 3:2 in I/O BAR might be writeable, so it is wrong to mask them when calculating BAR size. Spec references: See 6.2.5.1 for I/O and memory, and 6.2.5.2 for ROM, 6.1 for reserved bit handling; pages 225, 228 and 214 in PCI spec revision 3.0. See also Qemu pcbios commit 6ddb9f5c742b2b82b1755d7ec2a127f6e20e3806 Signed-off-by: Gleb Natapov Signed-off-by: Michael S. Tsirkin --- Write 0xffffffff to non rom bar to check its size and restore old value afterwards just like PCI spec recommends. -- Gleb. diff --git a/src/pciinit.c b/src/pciinit.c index 71177bc..39c8f0f 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -126,16 +126,28 @@ static void pci_bios_init_device(u16 bdf) /* default memory mappings */ for (i = 0; i < PCI_NUM_REGIONS; i++) { int ofs; - u32 val, size; - + u32 old, val, mask, size; if (i == PCI_ROM_SLOT) ofs = PCI_ROM_ADDRESS; else ofs = PCI_BASE_ADDRESS_0 + i * 4; - pci_config_writel(bdf, ofs, 0xffffffff); + + old = pci_config_readl(bdf, ofs); + if (i == PCI_ROM_SLOT) { + mask = PCI_ROM_ADDRESS_MASK; + pci_config_writel(bdf, ofs, mask); + } else { + if (val & PCI_BASE_ADDRESS_SPACE_IO) + mask = PCI_BASE_ADDRESS_IO_MASK; + else + mask = PCI_BASE_ADDRESS_MEM_MASK; + pci_config_writel(bdf, ofs, ~0); + } val = pci_config_readl(bdf, ofs); + pci_config_writel(bdf, ofs, old); + if (val != 0) { - size = (~(val & ~0xf)) + 1; + size = (~(val & mask)) + 1; if (val & PCI_BASE_ADDRESS_SPACE_IO) paddr = &pci_bios_io_addr; else if (size >= 0x04000000)