From patchwork Tue Oct 13 13:39:53 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: seabios: fix low bits in ROM and I/O sizing Date: Tue, 13 Oct 2009 03:39:53 -0000 From: Gleb Natapov X-Patchwork-Id: 35859 Message-Id: <20091013133952.GH3026@redhat.com> To: "Michael S. Tsirkin" Cc: kevin@koconnor.net, qemu-devel@nongnu.org This cleans up handling of low bits during BAR sizing, to match PCI spec requirements, and to use symbolic constants from pci_regs.h Issues fixed: For ROM BARs, bit 0 is writeable (enable bit), which we not only don't want to set, but it will stick and make us think it's an I/O port resource. Further, PCI spec defines the following bits as reserved: - bit 1 in I/O BAR - bits 10:1 in ROM BAR and we should be careful and preserve any values there, and should ignore anything we read from these registers. Bits 3:2 in I/O BAR might be writeable, so it is wrong to mask them when calculating BAR size. Spec references: See 6.2.5.1 for I/O and memory, and 6.2.5.2 for ROM, 6.1 for reserved bit handling; pages 225, 228 and 214 in PCI spec revision 3.0. See also Qemu pcbios commit 6ddb9f5c742b2b82b1755d7ec2a127f6e20e3806 Signed-off-by: Gleb Natapov Signed-off-by: Michael S. Tsirkin --- Write 0xffffffff to non rom bar to check its size and restore old value afterwards just like PCI spec recommends. -- Gleb. diff --git a/src/pciinit.c b/src/pciinit.c index 71177bc..39c8f0f 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -126,16 +126,28 @@ static void pci_bios_init_device(u16 bdf) /* default memory mappings */ for (i = 0; i < PCI_NUM_REGIONS; i++) { int ofs; - u32 val, size; - + u32 old, val, mask, size; if (i == PCI_ROM_SLOT) ofs = PCI_ROM_ADDRESS; else ofs = PCI_BASE_ADDRESS_0 + i * 4; - pci_config_writel(bdf, ofs, 0xffffffff); + + old = pci_config_readl(bdf, ofs); + if (i == PCI_ROM_SLOT) { + mask = PCI_ROM_ADDRESS_MASK; + pci_config_writel(bdf, ofs, mask); + } else { + if (val & PCI_BASE_ADDRESS_SPACE_IO) + mask = PCI_BASE_ADDRESS_IO_MASK; + else + mask = PCI_BASE_ADDRESS_MEM_MASK; + pci_config_writel(bdf, ofs, ~0); + } val = pci_config_readl(bdf, ofs); + pci_config_writel(bdf, ofs, old); + if (val != 0) { - size = (~(val & ~0xf)) + 1; + size = (~(val & mask)) + 1; if (val & PCI_BASE_ADDRESS_SPACE_IO) paddr = &pci_bios_io_addr; else if (size >= 0x04000000)