Patchwork Re: [PATCH 3/5] Use the correct mask to size the PCI option ROM BAR.

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Submitter Michael S. Tsirkin
Date Oct. 12, 2009, 9:52 a.m.
Message ID <20091012095225.GA11741@redhat.com>
Download mbox | patch
Permalink /patch/35741/
State New
Headers show

Comments

Michael S. Tsirkin - Oct. 12, 2009, 9:52 a.m.
On Mon, Oct 12, 2009 at 08:50:24AM +0200, Gleb Natapov wrote:
> Send patch with your favorite interpretation to qemu pcbios/seabios.
> The regression concern from my previous mail applicable here as well.

Okay. Can you ack the following?

For ROM, bit 0 is the enable bit, which we not only don't want
to set, but it will stick and make us think it's an I/O port
resource. For I/O and memory BARs bit 0 is read-only, so
it does not matter what we write there.

See Qemu pcbios commit 6ddb9f5c742b2b82b1755d7ec2a127f6e20e3806

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 src/pciinit.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Gleb Natapov - Oct. 12, 2009, 10:08 a.m.
On Mon, Oct 12, 2009 at 11:52:25AM +0200, Michael S. Tsirkin wrote:
> On Mon, Oct 12, 2009 at 08:50:24AM +0200, Gleb Natapov wrote:
> > Send patch with your favorite interpretation to qemu pcbios/seabios.
> > The regression concern from my previous mail applicable here as well.
> 
> Okay. Can you ack the following?
> 
I can if you'll add PCI spec reference for me to double check.
Also I prefer strict spec reading :)

> For ROM, bit 0 is the enable bit, which we not only don't want
> to set, but it will stick and make us think it's an I/O port
> resource. For I/O and memory BARs bit 0 is read-only, so
> it does not matter what we write there.
> 
> See Qemu pcbios commit 6ddb9f5c742b2b82b1755d7ec2a127f6e20e3806
> 
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
>  src/pciinit.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/src/pciinit.c b/src/pciinit.c
> index eab082a..d315526 100644
> --- a/src/pciinit.c
> +++ b/src/pciinit.c
> @@ -137,7 +137,7 @@ static void pci_bios_init_device(u16 bdf)
>                  ofs = PCI_ROM_ADDRESS;
>              else
>                  ofs = PCI_BASE_ADDRESS_0 + i * 4;
> -            pci_config_writel(bdf, ofs, 0xffffffff);
> +            pci_config_writel(bdf, ofs, 0xfffffffe);
>              val = pci_config_readl(bdf, ofs);
>              if (val != 0) {
>                  size = (~(val & ~0xf)) + 1;
> -- 
> 1.6.5.rc2

--
			Gleb.

Patch

diff --git a/src/pciinit.c b/src/pciinit.c
index eab082a..d315526 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -137,7 +137,7 @@  static void pci_bios_init_device(u16 bdf)
                 ofs = PCI_ROM_ADDRESS;
             else
                 ofs = PCI_BASE_ADDRESS_0 + i * 4;
-            pci_config_writel(bdf, ofs, 0xffffffff);
+            pci_config_writel(bdf, ofs, 0xfffffffe);
             val = pci_config_readl(bdf, ofs);
             if (val != 0) {
                 size = (~(val & ~0xf)) + 1;