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[2/3] x86 piix4: Correct SMBus base address

Message ID 1402304133-29620-3-git-send-email-marc.mari.barcelo@gmail.com
State New
Headers show

Commit Message

Marc Marí June 9, 2014, 8:55 a.m. UTC 
As defined in the PIIX4 datasheet in page 135, the base address is set
on bits [15:4]. The mask was changed to match those bits.

Datasheet: http://www.intel.com/assets/pdf/datasheet/290562.pdf

Found by Stefan Hajnoczi

Signed-off-by: Marc Marí <marc.mari.barcelo@gmail.com>
---
 hw/acpi/piix4.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 67dc075..5f263da 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -133,7 +133,7 @@  static void smbus_io_space_update(PIIX4PMState *s)
     PCIDevice *d = PCI_DEVICE(s);
 
     s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90));
-    s->smb_io_base &= 0xffc0;
+    s->smb_io_base &= 0xfff0;
 
     memory_region_transaction_begin();
     memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1);