diff mbox

[U-Boot,5/6] sunxi: use setbits_le32 to enable the DMA clock

Message ID 1401991217-1252-5-git-send-email-ijc@hellion.org.uk
State Accepted
Delegated to: Ian Campbell
Headers show

Commit Message

Ian Campbell June 5, 2014, 6 p.m. UTC 
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
---
v2: Split out from "ahci: provide sunxi SATA driver using AHCI
platform framework"
---
 arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Hans de Goede June 8, 2014, 12:19 p.m. UTC | #1 
On 06/05/2014 08:00 PM, Ian Campbell wrote:
> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> ---
> v2: Split out from "ahci: provide sunxi SATA driver using AHCI
> platform framework"

Looks good:

Acked-by: Hans de Goede <hdegoede@redhat.com>

Regards,

Hans

> ---
>  arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> index 5a7da3c..b8b16cf 100644
> --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> @@ -36,8 +36,7 @@ void clock_init_safe(void)
>  	       CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
>  	       &ccm->cpu_ahb_apb0_cfg);
>  #ifdef CONFIG_SUN7I
> -	writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
> -	       &ccm->ahb_gate0);
> +	setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
>  #endif
>  	writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
>  }
>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index 5a7da3c..b8b16cf 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -36,8 +36,7 @@  void clock_init_safe(void)
 	       CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
 	       &ccm->cpu_ahb_apb0_cfg);
 #ifdef CONFIG_SUN7I
-	writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
-	       &ccm->ahb_gate0);
+	setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
 #endif
 	writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
 }