From patchwork Fri Oct 9 11:04:59 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Tjernlund X-Patchwork-Id: 35614 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 448E4B7BA4 for ; Fri, 9 Oct 2009 22:06:39 +1100 (EST) Received: by ozlabs.org (Postfix) id 435E5B7BA1; Fri, 9 Oct 2009 22:06:33 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from gw1.transmode.se (gw1.transmode.se [213.115.205.20]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DD737B7B9D for ; Fri, 9 Oct 2009 22:06:32 +1100 (EST) Received: from sesr04.transmode.se (sesr04.transmode.se [192.168.201.15]) by gw1.transmode.se (Postfix) with ESMTP id CCE38650011; Fri, 9 Oct 2009 13:06:27 +0200 (CEST) In-Reply-To: <20091009064649.GA9660@compile2.chatsunix.int.mrv.com> References: <1255008298-19949-1-git-send-email-Joakim.Tjernlund@transmode.se> <20091009001527.GA6196@compile2.chatsunix.int.mrv.com> <20091009064649.GA9660@compile2.chatsunix.int.mrv.com> Subject: Re: [PATCH 0/6] 8xx MMU fixes X-KeepSent: DEC75DA5:7C7664B8-C125764A:003C37C9; type=4; name=$KeepSent To: Rex Feany X-Mailer: Lotus Notes Release 8.5 December 05, 2008 Message-ID: From: Joakim Tjernlund Date: Fri, 9 Oct 2009 13:04:59 +0200 X-MIMETrack: Serialize by Router on sesr04/Transmode(Release 8.5 HF407|May 07, 2009) at 2009-10-09 13:06:27 MIME-Version: 1.0 Cc: Scott Wood , "linuxppc-dev@ozlabs.org" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Rex Feany wrote on 09/10/2009 08:46:49: > > Thus spake Joakim Tjernlund (joakim.tjernlund@transmode.se): > > > Rex Feany wrote on 09/10/2009 02:15:27: > > > > open("/proc/mounts", O_RDONLY) = 3 > > > fstat64(0x3, 0x7fe7e2a8) = 0 > > > mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) =0x3001f000 > > > read(3, 0x3001f000, 1024) = -1 EFAULT (Bad address) > > > exit_group(0) = ? > > > > Try making the tlbil_va in fault.c unconditional, just to make sure > > there isn't any old TLBs around. > > didn't make a difference OK, so how about: diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 6541855..f4b5dca 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -339,9 +339,9 @@ InstructionTLBMiss: mfspr r11, SPRN_MD_TWC /* ....and get the pte address */ lwz r10, 0(r11) /* Get the pte */ - /* r10=(r10&~_PAGE_PRESENT)|((r10&_PAGE_ACCESSED)>>5) */ - rlwimi. r10, r10, 27, 31, 31 - beq- cr0, 2f /* Can be removed, costs a ITLB Err */ + andi. r11, r10, _PAGE_ACCESSED | _PAGE_PRESENT + cmpwi cr0, r11, _PAGE_ACCESSED | _PAGE_PRESENT + bne- cr0, 2f #if 0 /* Dont' bother with PP lsb, bit 21 for now */ /* r10 = (r10 & ~0x0400) | ((r10 & _PAGE_EXEC) << 7) */ @@ -429,9 +429,11 @@ DataStoreTLBMiss: /* Need to know if load/store -> force a TLB Error * by copying ACCESSED to PRESENT. */ - /* r10=(r10&~_PAGE_PRESENT)|((r10&_PAGE_ACCESSED)>>5) */ - rlwimi r10, r10, 27, 31, 31 - + andi. r11, r10, _PAGE_ACCESSED | _PAGE_PRESENT + cmpwi cr0, r11, _PAGE_ACCESSED | _PAGE_PRESENT + beq+ cr0, 6f + rlwinm r10, r10, 0, 0, 30 /* Clear _PAGE_PRESENT */ +6: #if 0 /* Not yet */ /* Honour kernel RO, User NA */ andi. r11, r10, _PAGE_USER | _PAGE_RW @@ -492,7 +494,7 @@ DataTLBError: cmpwi cr0, r10, 0x00f0 beq- FixDAR /* must be a buggy dcbX, icbi insn. */ DARFix: /* Return from dcbx instruction bug workaround, r10 holds value of DAR */ - + b 2f /* Do DIRTY in C */ mfspr r11, SPRN_DSISR andis. r11, r11, 0x4800 /* !translation or protection */ bne 2f /* branch if either is set */