| Message ID | 1401886265-6589-24-git-send-email-aik@ozlabs.ru |
|---|---|
| State | New |
| Headers | show |
On 6/4/2014 7:50 AM, Alexey Kardashevskiy wrote: > This adds POWER8 specific PMU MMCR2/MMCRS SPRs. > > Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> > --- > Changes: > v5: > * s/gen_spr_power8_pmu_hypv/gen_spr_power8_pmu_sup/ > * moved write_ureg in earlier patch > > v4: > * disabled write_ureg for user mode, privileged mode is still needed for > recent guest kernels to boot on POWER8 > --- > target-ppc/cpu.h | 3 +++ > target-ppc/translate_init.c | 22 ++++++++++++++++++++++ > 2 files changed, 25 insertions(+) > > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 7d566f3..8a27331 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -1480,6 +1480,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) > #define SPR_MPC_MI_CTR (0x300) > #define SPR_PERF1 (0x301) > #define SPR_RCPU_MI_RBA1 (0x301) > +#define SPR_POWER_UMMCR2 (0x301) > #define SPR_PERF2 (0x302) > #define SPR_RCPU_MI_RBA2 (0x302) > #define SPR_MPC_MI_AP (0x302) > @@ -1527,6 +1528,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) > #define SPR_MPC_MD_TW (0x30F) > #define SPR_UPERF0 (0x310) > #define SPR_UPERF1 (0x311) > +#define SPR_POWER_MMCR2 (0x311) > #define SPR_UPERF2 (0x312) > #define SPR_POWER_MMCRA (0X312) > #define SPR_UPERF3 (0x313) > @@ -1579,6 +1581,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) > #define SPR_440_ITV3 (0x377) > #define SPR_440_CCR1 (0x378) > #define SPR_DCRIPR (0x37B) > +#define SPR_POWER_MMCRS (0x37E) > #define SPR_PPR (0x380) > #define SPR_750_GQR0 (0x390) > #define SPR_440_DNV0 (0x390) > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 30ae66a..548b582 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -7507,6 +7507,26 @@ static void gen_spr_970_pmu_user(CPUPPCState *env) > 0x00000000); > } > > +static void gen_spr_power8_pmu_sup(CPUPPCState *env) > +{ > + spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + KVM_REG_PPC_MMCR2, 0x00000000); > + spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + KVM_REG_PPC_MMCRS, 0x00000000); > +} > + > +static void gen_spr_power8_pmu_user(CPUPPCState *env) > +{ > + spr_register(env, SPR_POWER_UMMCR2, "UMMCR2", > + &spr_read_ureg, SPR_NOACCESS, > + &spr_read_ureg, &spr_write_ureg, > + 0x00000000); > +} > + > static void gen_spr_power5p_ear(CPUPPCState *env) > { > /* External access control */ > @@ -7673,6 +7693,8 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) > gen_spr_power8_tce_address_control(env); > gen_spr_power8_ids(env); > gen_spr_power8_fscr(env); > + gen_spr_power8_pmu_sup(env); > + gen_spr_power8_pmu_user(env); > } > #if !defined(CONFIG_USER_ONLY) > switch (version) { > Reviewed-by: Tom Musta <tommusta@gmail.com>
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7d566f3..8a27331 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1480,6 +1480,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_MPC_MI_CTR (0x300) #define SPR_PERF1 (0x301) #define SPR_RCPU_MI_RBA1 (0x301) +#define SPR_POWER_UMMCR2 (0x301) #define SPR_PERF2 (0x302) #define SPR_RCPU_MI_RBA2 (0x302) #define SPR_MPC_MI_AP (0x302) @@ -1527,6 +1528,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_MPC_MD_TW (0x30F) #define SPR_UPERF0 (0x310) #define SPR_UPERF1 (0x311) +#define SPR_POWER_MMCR2 (0x311) #define SPR_UPERF2 (0x312) #define SPR_POWER_MMCRA (0X312) #define SPR_UPERF3 (0x313) @@ -1579,6 +1581,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_440_ITV3 (0x377) #define SPR_440_CCR1 (0x378) #define SPR_DCRIPR (0x37B) +#define SPR_POWER_MMCRS (0x37E) #define SPR_PPR (0x380) #define SPR_750_GQR0 (0x390) #define SPR_440_DNV0 (0x390) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 30ae66a..548b582 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7507,6 +7507,26 @@ static void gen_spr_970_pmu_user(CPUPPCState *env) 0x00000000); } +static void gen_spr_power8_pmu_sup(CPUPPCState *env) +{ + spr_register_kvm(env, SPR_POWER_MMCR2, "MMCR2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_MMCR2, 0x00000000); + spr_register_kvm(env, SPR_POWER_MMCRS, "MMCRS", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_MMCRS, 0x00000000); +} + +static void gen_spr_power8_pmu_user(CPUPPCState *env) +{ + spr_register(env, SPR_POWER_UMMCR2, "UMMCR2", + &spr_read_ureg, SPR_NOACCESS, + &spr_read_ureg, &spr_write_ureg, + 0x00000000); +} + static void gen_spr_power5p_ear(CPUPPCState *env) { /* External access control */ @@ -7673,6 +7693,8 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_tce_address_control(env); gen_spr_power8_ids(env); gen_spr_power8_fscr(env); + gen_spr_power8_pmu_sup(env); + gen_spr_power8_pmu_user(env); } #if !defined(CONFIG_USER_ONLY) switch (version) {
This adds POWER8 specific PMU MMCR2/MMCRS SPRs. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> --- Changes: v5: * s/gen_spr_power8_pmu_hypv/gen_spr_power8_pmu_sup/ * moved write_ureg in earlier patch v4: * disabled write_ureg for user mode, privileged mode is still needed for recent guest kernels to boot on POWER8 --- target-ppc/cpu.h | 3 +++ target-ppc/translate_init.c | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+)