From patchwork Fri Oct 9 07:51:05 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Miller X-Patchwork-Id: 35579 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by ozlabs.org (Postfix) with ESMTP id 1A3FCB7082 for ; Fri, 9 Oct 2009 18:55:33 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750703AbZJIHvK (ORCPT ); Fri, 9 Oct 2009 03:51:10 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752932AbZJIHvK (ORCPT ); Fri, 9 Oct 2009 03:51:10 -0400 Received: from 74-93-104-97-Washington.hfc.comcastbusiness.net ([74.93.104.97]:57551 "EHLO sunset.davemloft.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750703AbZJIHvJ (ORCPT ); Fri, 9 Oct 2009 03:51:09 -0400 Received: from localhost (localhost [127.0.0.1]) by sunset.davemloft.net (Postfix) with ESMTP id 3349EC8C2A3 for ; Fri, 9 Oct 2009 00:51:05 -0700 (PDT) Date: Fri, 09 Oct 2009 00:51:05 -0700 (PDT) Message-Id: <20091009.005105.93644105.davem@davemloft.net> To: sparclinux@vger.kernel.org Subject: [PATCH]: Fix niagara2 perf support... From: David Miller X-Mailer: Mew version 6.2.51 on Emacs 22.1 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Sender: sparclinux-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: sparclinux@vger.kernel.org While testing today I discovered that the perf IRQ bits for niagara-2 were wrong, fixes as follows and committed to sparc-2.6: sparc64: Fix niagara2 perf IRQ bits. Signed-off-by: David S. Miller --- arch/sparc/kernel/perf_event.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 04db927..fa5936e 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -437,7 +437,7 @@ static const struct sparc_pmu niagara2_pmu = { .lower_shift = 6, .event_mask = 0xfff, .hv_bit = 0x8, - .irq_bit = 0x03, + .irq_bit = 0x30, .upper_nop = 0x220, .lower_nop = 0x220, };