From patchwork Fri Oct 9 06:28:47 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [V5,14/29] pci: introduce FMT_PCIBUS for printf format for pcibus_t. Date: Thu, 08 Oct 2009 20:28:47 -0000 From: Isaku Yamahata X-Patchwork-Id: 35560 Message-Id: <1255069742-15724-15-git-send-email-yamahata@valinux.co.jp> To: qemu-devel@nongnu.org, mst@redhat.com Cc: yamahata@valinux.co.jp This patch is preliminary for 64bit BAR. Later pcibus_t will be changed from uint32_t to uint64_t. Introduce FMT_PCIBUS for printf format for pcibus_t. Signed-off-by: Isaku Yamahata Acked-by: Michael S. Tsirkin --- hw/e1000.c | 6 ++++-- hw/eepro100.c | 6 ++++-- hw/pci.c | 14 +++++++++----- hw/pci.h | 1 + hw/pcnet.c | 6 ++++-- hw/wdt_i6300esb.c | 3 ++- 6 files changed, 24 insertions(+), 12 deletions(-) diff --git a/hw/e1000.c b/hw/e1000.c index aa84f31..9056e2f 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -145,7 +145,8 @@ static void ioport_map(PCIDevice *pci_dev, int region_num, pcibus_t addr, pcibus_t size, int type) { - DBGOUT(IO, "e1000_ioport_map addr=0x%04x size=0x%08x\n", addr, size); + DBGOUT(IO, "e1000_ioport_map addr=0x%04"FMT_PCIBUS + " size=0x%08"FMT_PCIBUS"\n", addr, size); } static void @@ -1040,7 +1041,8 @@ e1000_mmio_map(PCIDevice *pci_dev, int region_num, }; - DBGOUT(MMIO, "e1000_mmio_map addr=0x%08x 0x%08x\n", addr, size); + DBGOUT(MMIO, "e1000_mmio_map addr=0x%08"FMT_PCIBUS" 0x%08"FMT_PCIBUS"\n", + addr, size); cpu_register_physical_memory(addr, PNPMMIO_SIZE, d->mmio_index); qemu_register_coalesced_mmio(addr, excluded_regs[0]); diff --git a/hw/eepro100.c b/hw/eepro100.c index 1a9e96e..da41b73 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -1398,7 +1398,8 @@ static void pci_map(PCIDevice * pci_dev, int region_num, { EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); - TRACE(OTHER, logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n", + TRACE(OTHER, logout("region %d, addr=0x%08"FMT_PCIBUS", " + "size=0x%08"FMT_PCIBUS", type=%d\n", region_num, addr, size, type)); assert(region_num == 1); @@ -1477,7 +1478,8 @@ static void pci_mmio_map(PCIDevice * pci_dev, int region_num, { EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); - TRACE(OTHER, logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n", + TRACE(OTHER, logout("region %d, addr=0x%08"FMT_PCIBUS", " + "size=0x%08"FMT_PCIBUS", type=%d\n", region_num, addr, size, type)); if (region_num == 0) { diff --git a/hw/pci.c b/hw/pci.c index 6d46e5b..c0ae66a 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -467,7 +467,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, if (size & (size-1)) { fprintf(stderr, "ERROR: PCI region size must be pow2 " - "type=0x%x, size=0x%x\n", type, size); + "type=0x%x, size=0x%"FMT_PCIBUS"\n", type, size); exit(1); } @@ -484,7 +484,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, wmask |= PCI_ROM_ADDRESS_ENABLE; } pci_set_long(pci_dev->config + addr, type); - pci_set_long(pci_dev->wmask + addr, wmask); + pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff); pci_set_long(pci_dev->cmask + addr, 0xffffffff); } @@ -762,10 +762,12 @@ static void pci_info_device(PCIDevice *d) if (r->size != 0) { monitor_printf(mon, " BAR%d: ", i); if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { - monitor_printf(mon, "I/O at 0x%04x [0x%04x].\n", + monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS + " [0x%04"FMT_PCIBUS"].\n", r->addr, r->addr + r->size - 1); } else { - monitor_printf(mon, "32 bit memory at 0x%08x [0x%08x].\n", + monitor_printf(mon, "32 bit memory at 0x%08"FMT_PCIBUS + " [0x%08"FMT_PCIBUS"].\n", r->addr, r->addr + r->size - 1); } } @@ -1112,7 +1114,9 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent) r = &d->io_regions[i]; if (!r->size) continue; - monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "", + monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS + " [0x%"FMT_PCIBUS"]\n", + indent, "", i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem", r->addr, r->addr + r->size - 1); } diff --git a/hw/pci.h b/hw/pci.h index 7d3911d..8a187c2 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -72,6 +72,7 @@ extern target_phys_addr_t pci_mem_base; #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 typedef uint32_t pcibus_t; +#define FMT_PCIBUS PRIx32 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, uint32_t address, uint32_t data, int len); diff --git a/hw/pcnet.c b/hw/pcnet.c index e9d2d73..6102e1a 100644 --- a/hw/pcnet.c +++ b/hw/pcnet.c @@ -1764,7 +1764,8 @@ static void pcnet_ioport_map(PCIDevice *pci_dev, int region_num, PCNetState *d = &DO_UPCAST(PCIPCNetState, pci_dev, pci_dev)->state; #ifdef PCNET_DEBUG_IO - printf("pcnet_ioport_map addr=0x%04x size=0x%04x\n", addr, size); + printf("pcnet_ioport_map addr=0x%04"FMT_PCIBUS" size=0x%04"FMT_PCIBUS"\n", + addr, size); #endif register_ioport_write(addr, 16, 1, pcnet_aprom_writeb, d); @@ -1990,7 +1991,8 @@ static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num, PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, pci_dev); #ifdef PCNET_DEBUG_IO - printf("pcnet_mmio_map addr=0x%08x 0x%08x\n", addr, size); + printf("pcnet_mmio_map addr=0x%08"FMT_PCIBUS" 0x%08"FMT_PCIBUS"\n", + addr, size); #endif cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE, d->state.mmio_index); diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c index 76f5dd9..9621035 100644 --- a/hw/wdt_i6300esb.c +++ b/hw/wdt_i6300esb.c @@ -362,7 +362,8 @@ static void i6300esb_map(PCIDevice *dev, int region_num, I6300State *d = DO_UPCAST(I6300State, dev, dev); int io_mem; - i6300esb_debug("addr = %x, size = %x, type = %d\n", addr, size, type); + i6300esb_debug("addr = %"FMT_PCIBUS", size = %"FMT_PCIBUS", type = %d\n", + addr, size, type); io_mem = cpu_register_io_memory(mem_read, mem_write, d); cpu_register_physical_memory (addr, 0x10, io_mem);