| Message ID | 772148b5d4435e60c32b73f3c92d28b61525b6d5.1400795768.git.segher@kernel.crashing.org |
|---|---|
| State | New |
| Headers | show |
On Fri, May 23, 2014 at 2:09 AM, Segher Boessenkool <segher@kernel.crashing.org> wrote: > Get rid of the one huge line. Group and order things a bit. Further > changes will follow so this doesn't try to make it perfect. > > The rest of this patch series reduces the number of different integer > instruction types by folding many together using attributes "size" > (the data size), "dot" (does this instruction set CR0), and "var_shift" > (for shift instructions: is the shift amount from a register). > > Many scheduling descriptions are incomplete; many instruction patterns > use the wrong instruction type. Hopefully things will be better if > there aren't that many different types to handle. > > Each patch bootstrapped on powerpc64-linux, tested with > -m64,-m64/-mtune=power8,-m32,-m32/-mpowerpc64; no regressions (and > nothing magically fixed either). > > Okay to apply? > > > Segher > > > 2014-05-22 Segher Boessenkool <segher@kernel.crashing.org> > > gcc/ > * config/rs6000/rs6000.md (type): Reorder, reformat. Okay. thanks, David
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 300bd36..667aac1 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -157,7 +157,22 @@ (define_c_enum "unspecv" ;; Define an insn type attribute. This is used in function unit delay ;; computations. -(define_attr "type" "integer,two,three,load,store,fpload,fpstore,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt,crypto,htm" +(define_attr "type" + "integer,two,three, + shift,var_shift_rotate,insert_word,insert_dword, + imul,imul2,imul3,lmul,idiv,ldiv, + exts,cntlz,popcnt,isel, + load,store,fpload,fpstore,vecload,vecstore, + cmp, + branch,jmpreg,mfjmpr,mtjmpr,trap,isync,sync,load_l,store_c, + compare,fast_compare,delayed_compare,var_delayed_compare, + imul_compare,lmul_compare, + cr_logical,delayed_cr,mfcr,mfcrf,mtcr, + fpcompare,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt, + brinc, + vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm, + vecfloat,vecfdiv,vecdouble,mffgpr,mftgpr,crypto, + htm" (const_string "integer")) ;; Does this instruction sign-extend its result?