diff mbox

PPC: openpic_kvm: Implement reset

Message ID 1400771812-1271-1-git-send-email-agraf@suse.de
State New, archived
Headers show

Commit Message

Alexander Graf May 22, 2014, 3:16 p.m. UTC 
When we trigger a system reset, the in-kernel openpic controller should also
get reset. This happens through a write to the GCR.RESET register which is
the same mechanism a guest would use to manually reset the device.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/intc/openpic_kvm.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)
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Patch

diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 585ab4f..e3bce04 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -31,6 +31,8 @@ 
 #include "sysemu/kvm.h"
 #include "qemu/log.h"
 
+#define GCR_RESET        0x80000000
+
 #define KVM_OPENPIC(obj) \
     OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC)
 
@@ -50,11 +52,6 @@  static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
     kvm_set_irq(kvm_state, n_IRQ, level);
 }
 
-static void kvm_openpic_reset(DeviceState *d)
-{
-    qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__);
-}
-
 static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
                               unsigned size)
 {
@@ -74,6 +71,14 @@  static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
     }
 }
 
+static void kvm_openpic_reset(DeviceState *d)
+{
+    KVMOpenPICState *opp = KVM_OPENPIC(d);
+
+    /* Trigger the GCR.RESET bit to reset the PIC */
+    kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t));
+}
+
 static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size)
 {
     KVMOpenPICState *opp = opaque;