| Message ID | 1400653228-31540-5-git-send-email-aik@ozlabs.ru |
|---|---|
| State | New |
| Headers | show |
On 5/21/2014 1:20 AM, Alexey Kardashevskiy wrote: > This duplicates code of init_proc_POWER7() in init_proc_POWER8() as > there will be registers implemented in POWER7 and missing in POWER8 > so we need separate init functions for POWER7 and POWER8. > > Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> > --- > target-ppc/translate_init.c | 27 ++++++++++++++++++++++++--- > 1 file changed, 24 insertions(+), 3 deletions(-) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index b92b447..3c37e93 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -7953,10 +7953,31 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data) > > static void init_proc_POWER8(CPUPPCState *env) > { > - /* inherit P7 */ > - init_proc_POWER7(env); > + gen_spr_ne_601(env); > + gen_spr_7xx(env); > + /* Time base */ > + gen_tbl(env); > + gen_spr_book3s_ids(env); > + gen_spr_book3s_common(env); > + gen_spr_amr(env); > + gen_spr_book3s_vr(env); > + gen_spr_book3s_lpar(env); > + gen_spr_book3s_purr(env); > + gen_spr_book3s_debug(env); > + gen_spr_book3s_pmu(env); > +#if !defined(CONFIG_USER_ONLY) > + env->slb_nr = 32; > +#endif /* !CONFIG_USER_ONLY */ > + init_excp_POWER7(env); > + env->dcache_line_size = 128; > + env->icache_line_size = 128; > + > + /* Allocate hardware IRQ controller */ > + ppcPOWER7_irq_init(env); > + /* Can't find information on what this should be on reset. This > + * value is the one used by 74xx processors. */ > + vscr_init(env, 0x00010000); > > - /* P8 supports the TAR */ > spr_register(env, SPR_TAR, "TAR", > &spr_read_generic, &spr_write_generic, > &spr_read_generic, &spr_write_generic, > Now that you have refactored the old MMCRx and new MMCRx SPR numbering, it looks like both old and new are assigned in the P7 and P8 models. Saying differently, you are calling gen_spr_7xx for P7/P7 and that routine assigns the old MMCRx SPRs. Intentional?
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index b92b447..3c37e93 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7953,10 +7953,31 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data) static void init_proc_POWER8(CPUPPCState *env) { - /* inherit P7 */ - init_proc_POWER7(env); + gen_spr_ne_601(env); + gen_spr_7xx(env); + /* Time base */ + gen_tbl(env); + gen_spr_book3s_ids(env); + gen_spr_book3s_common(env); + gen_spr_amr(env); + gen_spr_book3s_vr(env); + gen_spr_book3s_lpar(env); + gen_spr_book3s_purr(env); + gen_spr_book3s_debug(env); + gen_spr_book3s_pmu(env); +#if !defined(CONFIG_USER_ONLY) + env->slb_nr = 32; +#endif /* !CONFIG_USER_ONLY */ + init_excp_POWER7(env); + env->dcache_line_size = 128; + env->icache_line_size = 128; + + /* Allocate hardware IRQ controller */ + ppcPOWER7_irq_init(env); + /* Can't find information on what this should be on reset. This + * value is the one used by 74xx processors. */ + vscr_init(env, 0x00010000); - /* P8 supports the TAR */ spr_register(env, SPR_TAR, "TAR", &spr_read_generic, &spr_write_generic, &spr_read_generic, &spr_write_generic,
This duplicates code of init_proc_POWER7() in init_proc_POWER8() as there will be registers implemented in POWER7 and missing in POWER8 so we need separate init functions for POWER7 and POWER8. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> --- target-ppc/translate_init.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-)