Message ID | 5374E6B1.3080800@arm.com |
---|---|
State | New |
Headers | show |
Oops, I missed: gcc/ChangeLog: 2014-05-15 Alan Lawrence <alan.lawrence@arm.com> * config/aarch64/aarch64-modes.def: Add V1DFmode. * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): Support V1DFmode. gcc/testsuite/ChangeLog: 2014-05-15 Alan Lawrence <alan.lawrence@arm.com> * gcc.dg/vect/vect-singleton_1.c: New file. Alan Lawrence wrote: > This fixes an ICE on AArch64 when compiling code with a vector of exactly one > double, and seems the most specific/accurate way of fixing that specific case. > > I've included a test case of a range of other singleton vector types too > (compiles on aarch64-none-elf, x64_64, arm-none-eabi). > > No regressions on aarch64-none-elf. > > Cheers, Alan >
On 15 May 2014 17:12, Alan Lawrence <alan.lawrence@arm.com> wrote: > Oops, I missed: > > gcc/ChangeLog: > 2014-05-15 Alan Lawrence <alan.lawrence@arm.com> > > * config/aarch64/aarch64-modes.def: Add V1DFmode. > * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): > Support V1DFmode. > > gcc/testsuite/ChangeLog: > 2014-05-15 Alan Lawrence <alan.lawrence@arm.com> > > * gcc.dg/vect/vect-singleton_1.c: New file. OK /Marcus
diff --git a/gcc/config/aarch64/aarch64-modes.def b/gcc/config/aarch64/aarch64-modes.def index 1d2cc767946623fc557e2f6518827e40c4df9b73..f9c436948a6f5177761ee1d288809f05a7e841c1 100644 --- a/gcc/config/aarch64/aarch64-modes.def +++ b/gcc/config/aarch64/aarch64-modes.def @@ -31,6 +31,7 @@ VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI. */ VECTOR_MODES (FLOAT, 8); /* V2SF. */ VECTOR_MODES (FLOAT, 16); /* V4SF V2DF. */ +VECTOR_MODE (FLOAT, DF, 1); /* V1DF. */ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ INT_MODE (OI, 32); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index dacd7eebcf6ad000c43fbb86f74c343573b30615..601f54e63171c57dfa9fb316530baea0891f3247 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -6335,7 +6335,8 @@ aarch64_vector_mode_supported_p (enum machine_mode mode) || mode == V16QImode || mode == V2DImode || mode == V2SImode || mode == V4HImode || mode == V8QImode || mode == V2SFmode - || mode == V4SFmode || mode == V2DFmode)) + || mode == V4SFmode || mode == V2DFmode + || mode == V1DFmode)) return true; return false; diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c new file mode 100644 index 0000000000000000000000000000000000000000..6c2ff49cdab358245bfc3f5994724bb878c68d61 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c @@ -0,0 +1,38 @@ +/* PR target/59843 ICE on function taking/returning vector of one float64_t. */ + +/* { dg-do compile } */ +/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ + +#define TEST(BASETYPE, VECTYPE, SUFFIX) \ + typedef BASETYPE VECTYPE \ + __attribute__ ((__vector_size__ (sizeof (BASETYPE)))); \ + VECTYPE \ + test_vadd_##SUFFIX (VECTYPE a, VECTYPE b) \ + { \ + return a + b; \ + } \ + \ + void \ + test_##SUFFIX (BASETYPE val) \ + { \ + VECTYPE var = { val }; \ + BASETYPE v0 = var[0]; \ + BASETYPE v1 = var[1]; /* { dg-warning "index value is out of bound" } */ \ + } + +TEST (double, float64x1_t, f64) + +/* Original bug was for above type; + in a nod to completeness, test other types too. */ + +TEST (long long, int64x1_t, s64) + +TEST (float, float32x1_t, f32) + +TEST (long, longx1_t, l) + +TEST (int, intx1_t, i) + +TEST (short, int16x1_t, s16) + +TEST (char, int8x1_t, s8)