diff mbox

[U-Boot,U-Boot,5/5] ARM: DRA7xx: ctrl: Fix efuse register addresses

Message ID 1400132322-8166-6-git-send-email-lokeshvutla@ti.com
State Accepted
Delegated to: Tom Rini
Headers show

Commit Message

Lokesh Vutla May 15, 2014, 5:38 a.m. UTC 
Efuse register addresses are wrongly programmed.
Fixing the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>
---
 arch/arm/cpu/armv7/omap5/prcm-regs.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Tom Rini May 23, 2014, 11:50 p.m. UTC | #1 
On Thu, May 15, 2014 at 11:08:42AM +0530, Lokesh Vutla wrote:

> Efuse register addresses are wrongly programmed.
> Fixing the same.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Acked-by: Tom Rini <trini@ti.com>

Applied to u-boot-ti/master, thanks!
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 7292161..ff08ef4 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -447,10 +447,10 @@  struct omap_sys_ctrl_regs const dra7xx_ctrl = {
 	.control_wkup_control_spare_r		= 0x4AE0C5B4,
 	.control_wkup_control_spare_r_c0	= 0x4AE0C5B8,
 	.control_srcomp_east_side_wkup		= 0x4AE0C5BC,
-	.control_efuse_1			= 0x4AE0C5C0,
-	.control_efuse_2			= 0x4AE0C5C4,
-	.control_efuse_3			= 0x4AE0C5C8,
-	.control_efuse_4			= 0x4AE0C5CC,
+	.control_efuse_1			= 0x4AE0C5C8,
+	.control_efuse_2			= 0x4AE0C5CC,
+	.control_efuse_3			= 0x4AE0C5D0,
+	.control_efuse_4			= 0x4AE0C5D4,
 	.control_efuse_13			= 0x4AE0C5F0,
 };