From patchwork Fri Oct 2 20:28:57 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Wolf X-Patchwork-Id: 34904 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A4F011007D4 for ; Sat, 3 Oct 2009 07:05:26 +1000 (EST) Received: from localhost ([127.0.0.1]:33431 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MtpJc-0006Cm-0a for incoming@patchwork.ozlabs.org; Fri, 02 Oct 2009 17:05:24 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MtokZ-0001kr-3t for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:29:11 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MtokU-0001im-Hl for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:29:10 -0400 Received: from [199.232.76.173] (port=38611 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MtokU-0001ih-8w for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:29:06 -0400 Received: from mo-p00-ob.rzone.de ([81.169.146.160]:38193) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA1:24) (Exim 4.60) (envelope-from ) id 1MtokT-0002FS-T5 for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:29:06 -0400 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; t=1254515342; l=2226; s=domk; d=kevin-wolf.de; h=Date:Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH; bh=KS4GGZ7W+hBj3q8h+BGmgO1uTSQ=; b=DbpqRC6bHr8Rdpbsev9+Z3+iLgHVKl2o6E5OblPtQEQi24glRG/k2VzguE3qX8qsKgV nM3Jwj/hz8is0Exy7SHhWhlmDWS1jyT6n5l8Zj3D10IcyptOra/sMLiO3tBOdDS5yG8pl xk+6ptcC5SoPChk51elN9Vb63tayVqKXyro= X-RZG-AUTH: :IW0NeWCjfulXIi4BrEKXhgYy2jE0QmIac4DjsXgwMU4hzYdVlmgdZa97nxtwsYw= X-RZG-CLASS-ID: mo00 Received: from localhost.localdomain (R9be5.r.pppool.de [89.54.155.229]) by post.strato.de (mrclete mo62) (RZmta 22.1) with ESMTP id v0701bl92ICIU3 ; Fri, 2 Oct 2009 22:29:02 +0200 (MEST) From: Kevin Wolf To: qemu-devel@nongnu.org Date: Fri, 2 Oct 2009 22:28:57 +0200 Message-Id: <1254515337-14321-1-git-send-email-mail@kevin-wolf.de> X-Mailer: git-send-email 1.6.0.2 X-detected-operating-system: by monty-python.gnu.org: Solaris 10 (beta) Cc: Kevin Wolf Subject: [Qemu-devel] [PATCH] x86: Fix exceptions for fxsave/fxrstor X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch corrects the following aspects of exception generation in fxsave/fxrstor: * Generate #GP if the operand is not aligned to a 16 byte boundary * Generate #UD if the LOCK prefix is used * For CR0.EM = 1 #NM is generated, not #UD Signed-off-by: Kevin Wolf --- target-i386/op_helper.c | 10 ++++++++++ target-i386/translate.c | 8 ++++---- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index 33d44b0..3f05532 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -4338,6 +4338,11 @@ void helper_fxsave(target_ulong ptr, int data64) CPU86_LDouble tmp; target_ulong addr; + /* The operand must be 16 byte aligned */ + if (ptr & 0xf) { + raise_exception(EXCP0D_GPF); + } + fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; fptag = 0; for(i = 0; i < 8; i++) { @@ -4394,6 +4399,11 @@ void helper_fxrstor(target_ulong ptr, int data64) CPU86_LDouble tmp; target_ulong addr; + /* The operand must be 16 byte aligned */ + if (ptr & 0xf) { + raise_exception(EXCP0D_GPF); + } + env->fpuc = lduw(ptr); fpus = lduw(ptr + 2); fptag = lduw(ptr + 4); diff --git a/target-i386/translate.c b/target-i386/translate.c index 5b11d7f..9af2eed 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7436,9 +7436,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(op) { case 0: /* fxsave */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || - (s->flags & HF_EM_MASK)) + (s->prefix & PREFIX_LOCK)) goto illegal_op; - if (s->flags & HF_TS_MASK) { + if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; } @@ -7450,9 +7450,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; case 1: /* fxrstor */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || - (s->flags & HF_EM_MASK)) + (s->prefix & PREFIX_LOCK)) goto illegal_op; - if (s->flags & HF_TS_MASK) { + if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; }